Techniques for reduction of degradation in channels caused by bias temperature instability
An integrated circuit includes a multiplexer circuit coupled to receive a first clock signal and a second clock signal and coupled to provide an output clock signal to a channel. A protection circuit is coupled to receive a feedback signal from the channel. The protection circuit causes the multiplexer circuit to provide oscillations in the second clock signal to the output clock signal in response to the feedback signal indicating that the channel is idle to cause the channel to be in a protection mode that reduces degradation from bias temperature instability. The protection circuit causes the multiplexer circuit to provide oscillations in the first clock signal to the output clock signal in response to the feedback signal indicating that the channel is active.
1 . An integrated circuit comprising:
a first multiplexer circuit coupled to receive a first clock signal and a second clock signal, wherein the first multiplexer circuit is coupled to provide an output clock signal to a channel; and
a protection circuit coupled to receive a feedback signal from the channel, wherein the protection circuit causes the first multiplexer circuit to provide oscillations in the second clock signal to the output clock signal in response to the feedback signal indicating that the channel is idle to cause the channel to be in a first protection mode that reduces degradation from bias temperature instability, wherein the protection circuit causes the first multiplexer circuit to provide oscillations in the first clock signal to the output clock signal in response to the feedback signal indicating that the channel is active,
wherein the protection circuit comprises a second multiplexer circuit coupled to the first multiplexer circuit, and wherein the second multiplexer circuit controls whether the first multiplexer circuit is in an automatic protection mode or in a manual protection mode in response to a first control signal.
2 . The integrated circuit of claim 1 , wherein the protection circuit further comprises:
a bias temperature instability mitigation circuit coupled to receive the feedback signal, wherein the bias temperature instability mitigation circuit asserts a second control signal in response to the feedback signal indicating that the channel is idle; and
an automatic control circuit that asserts a third control signal in response to the second control signal being asserted.
3 . The integrated circuit of claim 2 , wherein the second multiplexer circuit asserts a select signal in response to the third control signal being asserted and in response to the first control signal indicating the automatic protection mode, and wherein the first multiplexer circuit provides oscillations in the second clock signal to the output clock signal in response to the select signal being asserted.
4 . The integrated circuit of claim 1 , wherein the integrated circuit is a configurable logic integrated circuit.
5 . The integrated circuit of claim 1 , wherein the second multiplexer circuit causes the first multiplexer circuit to provide oscillations in the first clock signal or in the second clock signal to the output clock signal based on a second control signal in the manual protection mode.
6 . The integrated circuit of claim 1 , wherein the protection circuit further comprises:
a bias temperature instability mitigation circuit coupled to receive the feedback signal, wherein the bias temperature instability mitigation circuit generates a second control signal based on the feedback signal; and
an automatic control circuit that generates a third control signal based on the second control signal, wherein the second multiplexer circuit causes the first multiplexer circuit to provide oscillations in the first clock signal or in the second clock signal to the output clock signal based on the third control signal in the automatic protection mode.
7 . The integrated circuit of claim 1 , wherein the protection circuit comprises:
a sideband interface circuit coupled to receive user control signals, wherein the protection circuit causes the first multiplexer circuit to provide oscillations in the first clock signal or in the second clock signal to the output clock signal based on the user control signals received at the sideband interface circuit.
8 . The integrated circuit of claim 1 , wherein the protection circuit generates output signals that indicate internal engineering validation mode measurements in response to the feedback signal received from the channel.
9 . The integrated circuit of claim 1 , wherein the feedback signal comprises at least one of a feedback clock signal from the channel or an activity status signal from the channel, and wherein the second clock signal has a lower frequency than a frequency of the first clock signal.
10 . A method for controlling a bias temperature instability protection mode in a channel, wherein the method comprises:
receiving a feedback signal from the channel at a control circuit;
controlling whether a first multiplexer circuit is in an automatic protection mode or in a manual protection mode in response to a first control signal using a second multiplexer circuit;
generating a select signal with the second multiplexer circuit in the control circuit based on the feedback signal indicating activity in the channel;
providing oscillations in a first clock signal to an output clock signal using the first multiplexer circuit in response to the select signal indicating that the channel is active, wherein the output clock signal is provided to the channel; and
providing oscillations in a second clock signal to the output clock signal using the first multiplexer circuit in response to the select signal indicating that the channel is inactive to cause the channel to be in the bias temperature instability protection mode that reduces degradation from bias temperature instability.
11 . The method of claim 10 further comprising:
asserting a second control signal in response to the feedback signal indicating that the channel is inactive using a bias temperature instability mitigation circuit that is coupled to receive the feedback signal; and
asserting a third control signal in response to the second control signal being asserted using an automatic protection control circuit to cause the select signal to indicate that the channel is inactive.
12 . The method of claim 11 further comprising:
asserting the select signal to a value that indicates that the channel is inactive in response to the third control signal being asserted using the second multiplexer circuit.
13 . The method of claim 10 , wherein the control circuit is in a configurable logic integrated circuit.
14 . The method of claim 10 further comprising:
generating a second control signal in response to the feedback signal with a bias temperature instability mitigation circuit;
generating a third control signal in response to the second control signal with an automatic protection circuit; and
causing the first multiplexer circuit to provide oscillations in the first clock signal or in the second clock signal to the output clock signal with the second multiplexer circuit based on the third control signal in the automatic protection mode.
15 . The method of claim 10 further comprising:
causing the first multiplexer circuit to provide oscillations in the first clock signal or in the second clock signal to the output clock signal based on user control signals received at a sideband interface circuit in the control circuit.
16 . The method of claim 10 further comprising:
generating output status signals that indicate that the channel is in the bias temperature instability protection mode in response to the feedback signal indicating that the channel is inactive using a sideband interface circuit in the control circuit.
17 . A circuit system comprising:
a transceiver circuit comprising a channel;
a first multiplexer circuit coupled to provide an output clock signal to the transceiver circuit; and
a clock protection control circuit that causes the first multiplexer circuit to provide a first clock signal as the output clock signal in response to a feedback signal from the channel indicating that the channel is inactive to cause the channel to be in a bias temperature instability protection mode that reduces degradation in the channel, wherein the clock protection control circuit causes the first multiplexer circuit to provide a second clock signal as the output clock signal in response to the feedback signal indicating that the channel is active, and
wherein the clock protection control circuit comprises a second multiplexer circuit that controls whether the first multiplexer circuit is in an automatic protection mode or in a manual protection mode in response to a first control signal.
18 . The circuit system of claim 17 , wherein the clock protection control circuit further comprises:
a bias temperature instability mitigation circuit that generates a second control signal in response to the feedback signal,
wherein the second multiplexer circuit causes the first multiplexer circuit to provide the first clock signal or the second clock signal as the output clock signal based on the first second control signal in the automatic protection mode.
19 . The circuit system of claim 17 , wherein the clock protection control circuit further comprises:
a sideband interface circuit, wherein the clock protection control circuit causes the first multiplexer circuit to provide the first clock signal as the output clock signal based on user control signals received at the sideband interface circuit to cause the channel to be in the bias temperature instability protection mode.
20 . The circuit system of claim 17 , wherein the second multiplexer circuit causes the first multiplexer circuit to provide the first clock signal or the second clock signal as the output clock signal based on a second control signal in the manual protection mode.