Semiconductor device and manufacturing method of semiconductor device
A semiconductor device includes a stacked structure including conductive layers and insulating layers stacked alternately with each other, a channel layer passing through the stacked structure, a ferroelectric layer surrounding a sidewall of the channel layer, a first dielectric layer surrounding a sidewall of the ferroelectric layer, and sacrificial patterns interposed between the first dielectric layer and the insulating layers and including a material with a higher dielectric constant than the first dielectric layer.
1. A method of manufacturing a semiconductor device, the method comprising:
forming a stacked structure with first material layers and second material layers that are stacked alternately with each other;
forming a first opening passing through the stacked structure, the first opening with an inner wall that has the second material layers protruding farther than the first material layers;
forming a sacrificial layer in the first opening;
forming a first dielectric layer in the sacrificial layer, the first dielectric layer with a lower dielectric constant than the sacrificial layer;
forming a ferroelectric layer in the first dielectric layer; and
forming a channel layer in the ferroelectric layer.
2. The method of claim 1 , wherein the forming of the first opening comprises:
forming a mask pattern on the stacked structure;
forming an opening by etching the stacked structure by using the mask pattern as an etch barrier; and
selectively etching the first material layers that are exposed through the opening.
3. The method of claim 1 , wherein the forming of the first opening comprises:
forming a mask pattern on the stacked structure;
forming an opening by etching the stacked structure by using the mask pattern as an etch barrier; and
selectively depositing a second material on the second material layers that are exposed through the opening.
4. The method of claim 1 , further comprising forming a second dielectric layer, the second dielectric layer with a material that has a higher dielectric constant than the first dielectric layer, in the first dielectric layer before the forming of the ferroelectric layer.
5. The method of claim 1 , further comprising forming a second dielectric layer, the second dielectric layer with a material that has a larger band gap than the ferroelectric layer, in the first dielectric layer before the forming of the ferroelectric layer.
6. The method of claim 1 , further comprising forming a third dielectric layer, the third dielectric layer with a material that has a higher dielectric constant than the first dielectric layer, in the ferroelectric layer.
7. The method of claim 1 , further comprising forming a third dielectric layer, the third dielectric layer with a material that has a larger band gap than the ferroelectric layer, in the ferroelectric layer.
8. The method of claim 1 , further comprising:
forming second openings by selectively etching the first material layers;
etching the sacrificial layer through the second openings to expose the first dielectric layer; and
forming conductive layers in the second openings.
9. The method of claim 1 , further comprising:
forming third openings by selectively etching the second material layers; and
forming air gaps in the third openings by sealing the third openings.
10. The method of claim 9 , further comprising etching the sacrificial layer through the third openings.