Granted Patent B2

US 12,713,943 · App. 17/749,442 · Granted Aug 18, 2026

Inventors: Shaowu Huang (Sunnyvale, CA); Javier A. Delacruz (San Jose, CA)

Assignee: Adeia Semiconductor Technologies LLC

H10W70/611H10W70/05H10W70/65H10W70/688H10W70/69H10W90/00H10W70/093H10W80/312H10W80/327H10W90/10H10W90/794

Abstract

Claims (40)

1 . A microelectronics device, comprising:

a flexible substrate having an upper surface including an inorganic dielectric layer and conductive metal pads, the conductive metal pads connected to conductive lines of the flexible substrate; and

a plurality of dielets hybrid bonded directly to the inorganic dielectric layer and the conductive metal pads of the flexible substrate;

wherein the plurality of hybrid bonded dielets comprises:

direct-contact metal-to-metal direct-bonds physically coupling and electrically coupling the plurality of hybrid bonded dielets to the conductive lines such that the plurality of hybrid bonded dielets are electrically coupled together via the conductive lines, the direct-contact metal-to-metal direct-bonds comprising directly bonded conductive metal pads in direct contact with one another; and

dielectric-to-dielectric bonds between the inorganic dielectric layer and the plurality of hybrid bonded dielets such that dielectrics on each side of an interface are directly bonded together and contact one another; and

wherein the inorganic dielectric layer is between the conductive lines and the plurality of hybrid bonded dielets.

2 . The microelectronics device of claim 1 , wherein the flexible substrate comprises a polymer and an oxide layer on the polymer, wherein the dielectric-to-dielectric bonds are between the oxide layer and the plurality of dielets.

3 . The microelectronics device of claim 1 , wherein the flexible substrate is stretchable or twistable.

4 . The microelectronics device of claim 1 , wherein the conductive lines have a pitch of approximately 5 microns or less.

5 . The microelectronics device of claim 1 , wherein the conductive lines have a pitch of approximately 3 microns or less.

6 . The microelectronics device of claim 1 , wherein the dielets have footprint dimensions in a range of approximately 0.25×0.25 millimeters to approximately 5.0×5.0 millimeters.

7 . The microelectronics device of claim 1 , wherein the metal to metal direct-bonds have a pitch of approximately 5 microns or less.

8 . The microelectronics device of claim 1 , wherein the metal to metal direct-bonds have a pitch of approximately 3 microns or less.

9 . The microelectronics device of claim 1 , wherein the dielets are coupled to the conductive lines through standard I/O interfaces onboard the dielets.

10 . The microelectronics device of claim 1 , wherein a material of the flexible substrate is selected from the group consisting of polyethylene terephthalate (PET), heat stabilized PET, polyetheretherketone (PEEK), polyethylene napthalate (PEN), heat stabilized PEN, polycarbonate (PC), polyethersulphone (PES), polyarylate (PAR), polycyclic olefin (PCO), polynorbonene (PNB), and polyimide (PI).

11 . The microelectronics device of claim 1 , wherein the flexible substrate comprises a bent shape and the conductive lines conform to the bent shape of the flexible substrate.

12 . A microelectronics device, comprising:

a substrate comprising a polymer, the substrate having an upper surface including an inorganic dielectric layer comprising an oxide layer and conductive metal pads, the conductive metal pads connected to conductive lines of the substrate; and

a plurality of dielets hybrid bonded directly to the inorganic dielectric layer and the conductive metal pads of the substrate;

wherein the plurality of hybrid bonded dielets comprises:

direct-contact metal-to-metal direct-bonds electrically coupling the plurality of hybrid bonded dielets to the conductive lines such that the plurality of hybrid bonded dielets are electrically coupled together via the conductive lines, the direct-contact metal-to-metal direct-bonds comprising directly bonded conductive metal pads in direct contact with one another; and

dielectric-to-dielectric bonds between the oxide layer and the plurality of hybrid bonded dielets such that oxide bonds are formed between the oxide layer and the plurality of dielets; and

wherein the inorganic dielectric layer is between the conductive lines and the plurality of hybrid bonded dielets.

13 . The microelectronics device of claim 12 , wherein the substrate comprises a plastic.

14 . The microelectronics device of claim 12 , wherein a pitch of the conductive lines is approximately 5 microns or less.

15 . The microelectronics device of claim 12 , wherein a pitch of the conductive lines is approximately 3 microns or less.

16 . The microelectronics device of claim 12 , wherein a pitch of the metal to metal direct-bonds is approximately 5 microns or less.

17 . The microelectronics device of claim 12 , wherein a pitch of the metal to metal direct-bonds is approximately 3 microns or less.

18 . The microelectronics device of claim 12 , wherein the substrate is stretchable or twistable and the conductive lines comprise a stretchable and twistable routing layer.

19 . The microelectronics device of claim 12 , wherein the conductive lines and the direct-bonds are at a pitch of approximately 5 microns.

20 . The microelectronics device of claim 12 , wherein the dielets have footprint dimensions in a range of approximately 0.25×0.25 millimeters to approximately 5.0×5.0 millimeters.

21 . The microelectronics device of claim 12 , wherein the conductive lines and the metal to metal direct-bonds are at a pitch of less than 3 microns.

22 . The microelectronics device of claim 12 , wherein the dielets are coupled to the conductive lines through standard I/O interfaces onboard the dielets.

23 . The microelectronics device of claim 12 , wherein the polymer of the substrate is selected from the group consisting of polyethylene terephthalate (PET), heat stabilized PET, polyetheretherketone (PEEK), polyethylene napthalate (PEN), heat stabilized PEN, polycarbonate (PC), polyethersulphone (PES), polyarylate (PAR), polycyclic olefin (PCO), polynorbonene (PNB), and polyimide (PI).

24 . The microelectronics device of claim 1 , further comprising an encapsulant interspersed between and at least partially encapsulating the dielets.

25 . The microelectronics device of claim 1 , wherein the dielets are electrically coupled together via the conductive lines through native core-level interconnects of the dielets.

26 . The microelectronics device of claim 12 , further comprising an encapsulant interspersed between and at least partially encapsulating the dielets.

27 . The microelectronics device of claim 12 , wherein the dielets are electrically coupled together via the conductive lines through native core-level interconnects of the dielets.

28 . The microelectronics device of claim 12 , wherein the substrate comprises a bent shape and the conductive lines conform to the bent shape of the substrate.

Assignments (4)

Continuity (3)

References Cited (400)