IP Library Granted Patent US 12,471,458
Granted Patent B2
US 12,471,458 · App. 17/788,794 · Granted Nov 11, 2025

Display panel and display device

Inventor: Jianchao Zhu (Beijing, CN)
Assignee: Beijing BOE Technology Development Co., Ltd.
H10K59/131G09G3/3233G09G2300/0426G09G2300/0842H10K59/1201H10K59/80515H10K59/80521
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Quick Facts
Patent No.
US 12,471,458
App. No.
17/788,794
Granted
Nov 11, 2025
Kind
B2
Abstract

The present disclosure provides a display panel and a display device. The display panel includes: a base substrate, on which a first metal layer and a second metal layer are stacked; and organic light emitting diode devices on a side, away from the base substrate, of the first metal layer. The first metal layer includes a power signal line. The power signal line is electrically connected with the second electrode layer in a peripheral area. Each organic light-emitting diode device includes a first electrode layer, a light emitting layer and a second electrode layer which are sequentially arranged on the base substrate. The second power signal line includes traces in a first direction and traces in a second direction, and orthographic projections of the traces in the first direction on the base substrate are intersected with orthographic projections of the traces in the second direction on the base substrate.

Claims (40)

1 . A display panel having a display area and a peripheral area, comprising:

a base substrate, on which an active layer, a first insulating layer, a first gate layer, a second gate layer, a first metal layer and a second metal layer are stacked;

organic light emitting diode devices arranged on a side, away from the base substrate, of the first metal layer, each of the organic light emitting diode devices comprises a first electrode layer, a light emitting layer and a second electrode layer which are sequentially arranged on the base substrate, wherein

the first metal layer comprises a second power signal line;

the second metal layer comprises an initialization voltage signal line, a first power signal line and a data signal line;

the second power signal line and the second electrode layer are electrically connected with each other in the peripheral area;

the second power signal line comprises a plurality of traces extending in a first direction and a plurality of traces extending in a second direction, and orthographic projections of the traces extending in the first direction on the base substrate are intersected with orthographic projections of the traces extending in the second direction on the base substrate,

each of the organic light emitting diode devices belongs to one sub-pixel unit, each sub-pixel unit corresponds to at least one of the traces extending in the second direction, the at least one of the traces extending in the second direction corresponding to said each sub-pixel unit is arranged uniformly along the first direction, and each of the first electrode layer, the light emitting layer and the second electrode layer of said each of the organic light emitting diode devices is symmetrical with respect to a symmetry axis of the at least one of the traces extending in the second direction corresponding to the sub-pixel unit which said each of the organic light emitting diode devices belongs to, the symmetry axis extends in the second direction.

2 . The display panel of claim 1 , wherein the traces in the first direction and the traces in the second direction are disposed in a same layer.

3 . The display panel of claim 2 , wherein, in the display area, the orthographic projections of the traces in the first direction on the base substrate are overlapped with an orthographic projection of the second metal layer on the base substrate.

4 . The display panel of claim 3 , wherein, in the display area, the orthographic projections of the traces in the first direction on the base substrate are overlapped with an orthographic projection of the initialization voltage signal line on the base substrate.

5 . The display panel of claim 4 , wherein M sub-pixel units are provided between every two adjacent traces in the first direction;

N sub-pixel units are provided between every two adjacent traces in the second direction; and

M and N are positive integers.

6 . A display device, comprising the display panel of claim 4 .

7 . The display panel of claim 3 , wherein, in the display area, the orthographic projections of the traces in the first direction on the base substrate are overlapped with an orthographic projection of the first power signal line on the base substrate.

8 . The display panel of claim 7 , wherein M sub-pixel units are provided between every two adjacent traces in the first direction;

N sub-pixel units are provided between every two adjacent traces in the second direction; and

M and N are positive integers.

9 . A display device, comprising the display panel of claim 7 .

10 . The display panel of claim 3 , wherein, in the display area, the orthographic projections of the traces in the first direction on the base substrate are overlapped with an orthographic projection of the data signal line on the base substrate.

11 . The display panel of claim 10 , wherein M sub-pixel units are provided between every two adjacent traces in the first direction;

N sub-pixel units are provided between every two adjacent traces in the second direction; and

M and N are positive integers.

12 . The display panel of claim 3 , wherein, in the display area, the orthographic projections of the traces in the second direction on the base substrate are overlapped with an orthographic projection of the second gate layer on the base substrate.

13 . The display panel of claim 12 , wherein M sub-pixel units are provided between every two adjacent traces in the first direction;

N sub-pixel units are provided between every two adjacent traces in the second direction; and

M and N are positive integers.

14 . The display panel of claim 3 , wherein M sub-pixel units are provided between every two adjacent traces in the first direction;

N sub-pixel units are provided between every two adjacent traces in the second direction; and

M and N are positive integers.

15 . A display device, comprising the display panel of claim 3 .

16 . The display panel of claim 2 , wherein M sub-pixel units are provided between every two adjacent traces in the first direction;

N sub-pixel units are provided between every two adjacent traces in the second direction; and

M and N are positive integers.

17 . A display device, comprising the display panel of claim 2 .

18 . The display panel of claim 1 , wherein M sub-pixel units are provided between every two adjacent traces in the first direction;

N sub-pixel units are provided between every two adjacent traces in the second direction; and

M and N are positive integers.

19 . A display device, comprising the display panel of claim 1 .

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 20, 2025
From: BOE TECHNOLOGY GROUP CO., LTD.
To: BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD.
Reel/Frame 072978/0731 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 6, 2022
From: ZHU, JIANCHAO
To: BOE TECHNOLOGY GROUP CO., LTD.
Reel/Frame 061100/0276 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 24, 2022
From: ZHU, JIANCHAO
To: BOE TECHNOLOGY GROUP CO., LTD.
Reel/Frame 060441/0029 →
Priority Claims (1)
CN 202011110228.8 · Oct 16, 2020 · national
Continuity (1)
Related Publication 20230030321A1 · Feb 2, 2023
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