Half-bridge circuit using monolithic flip-chip GaN power devices
GaN-based half bridge power conversion circuits employ control, support and logic functions that are monolithically integrated on the same devices as the power transistors. In some embodiments a low side GaN device communicates through one or more level shift circuits with a high side GaN device. Various embodiments of level shift circuits and their inventive aspects are disclosed.
1. An electronic device, comprising:
a monolithic semiconductor substrate including at least one layer of gallium-nitride disposed on a layer of silicon;
a plurality of flip-chip bumps;
an under-voltage lock-out circuit formed on the monolithic semiconductor substrate;
a low-side circuit formed on the monolithic semiconductor substrate, the low-side circuit comprising:
a low-side transistor including a low-side transistor control gate, a low-side source, and a low-side drain; and
a low-side transistor driver, arranged to control a conductivity state of the low-side transistor according to a first input signal; and
a high-side circuit formed on the monolithic semiconductor substrate, the high-side circuit comprising:
a high-side transistor including a high-side transistor control gate, a high-side source, and a high-side drain; and
a high-side transistor driver arranged to control a conductivity state of the high-side transistor according to a second input signal;
wherein the low-side drain is electrically connected to the high-side source to form a half-bridge circuit.
2. The electronic device of claim 1 wherein the at least one layer of gallium-nitride is a composite stack of III-nitrides.
3. The electronic device of claim 1 wherein the at least one layer of gallium-nitride includes a layer of aluminum gallium nitride.
4. The electronic device of claim 1 wherein the low-side transistor and the high-side transistor are enhancement-mode transistors.
5. The electronic device of claim 1 further comprising a level-shift circuit electrically coupled to the high-side transistor driver.
6. The electronic device of claim 1 wherein the electrical connection between the low-side drain and the high-side source is formed through the plurality of flip-chip bumps.
7. An electronic device comprising:
a gallium-nitride based monolithic semiconductor substrate;
a plurality of flip-chip bumps coupled to the monolithic semiconductor substrate;
an under-voltage lock-out circuit formed on the monolithic semiconductor substrate;
a low-side transistor disposed on the monolithic semiconductor substrate, the low-side transistor including a low-side transistor control gate, a low-side source, and a low-side drain wherein the low-side transistor is controlled by a low-side transistor driver circuit arranged to control a conductivity state of the low-side transistor in response to receiving a first input signal; and
a high-side transistor disposed on the monolithic semiconductor substrate, the high-side transistor including a high-side transistor control gate, a high-side source, and a high-side drain wherein the high-side transistor is controlled by a high-side transistor driver circuit arranged to control a conductivity state of the high-side transistor in response to receiving a second input signal;
wherein the low-side drain is electrically connected to the high-side source forming a switch-node of a half-bridge circuit.
8. The electronic device of claim 7 wherein the gallium-nitride based monolithic semiconductor substrate includes a composite stack of III-nitrides.
9. The electronic device of claim 7 wherein the gallium-nitride based monolithic semiconductor substrate includes a layer of aluminum gallium nitride.
10. The electronic device of claim 7 wherein the low-side transistor and the high-side transistor are enhancement-mode transistors.
11. The electronic device of claim 7 further comprising a level-shift circuit electrically coupled to the high-side transistor driver circuit.
12. The electronic device of claim 7 wherein the low-side transistor driver circuit is disposed on the monolithic semiconductor substrate.
13. The electronic device of claim 7 wherein the high-side transistor driver circuit is disposed on the monolithic semiconductor substrate.
14. A method of forming an electronic device, the method comprising:
forming a monolithic semiconductor substrate comprising gallium-nitride;
coupling a plurality of flip-chip bumps to the monolithic semiconductor substrate;
forming an under-voltage lock-out circuit formed on the monolithic semiconductor substrate;
forming a low-side transistor within the monolithic semiconductor substrate, the low-side transistor including a low-side transistor control gate, a low-side source, and a low-side drain wherein the low-side transistor is controlled by a low-side transistor driver circuit arranged to control a conductivity state of the low-side transistor in response to receiving a first input signal;
forming a high-side transistor within the monolithic semiconductor substrate, the high-side transistor including a high-side transistor control gate, a high-side source, and a high-side drain wherein the high-side transistor is controlled by a high-side transistor driver circuit arranged to control a conductivity state of the high-side transistor in response to receiving a second input signal; and
electrically connecting the low-side drain to the high-side source to form a switch-node of a half-bridge circuit.
15. The method of claim 14 wherein the monolithic semiconductor substrate includes a composite stack of III-nitrides.
16. The method of claim 14 wherein the monolithic semiconductor substrate includes a layer of aluminum gallium nitride.
17. The method of claim 14 wherein the low-side transistor and the high-side transistor are enhancement-mode transistors.
18. The method of claim 14 further comprising forming a level-shift circuit electrically coupled to the high-side transistor driver circuit.
19. The method of claim 14 further comprising forming the low-side transistor driver circuit within the monolithic semiconductor substrate.
20. The method of claim 14 further comprising forming the high-side transistor driver circuit within the monolithic semiconductor substrate.