Pixel circuit configured to control light-emitting element
A pixel circuit includes a first switching transistor between a gate and a drain of a driving transistor, a second switching transistor, and an auxiliary capacitor connected to the second switching transistor. The second switching transistor transfers a data signal voltage from a data line to a storage capacitor through the driving transistor and the first switching transistor. The auxiliary capacitor retains the auxiliary charges depending on the data signal voltage from the data line during a first period where the second and first switching transistors are ON. The auxiliary charges are transfer from the auxiliary capacitor to the storage capacitor through the first switching transistor and the driving transistor during the second period where the second switching transistor is OFF and the first switching transistor is ON. Capacitance of the auxiliary capacitor is equal to or larger than ½ of capacitance of the storage capacitor.
1. A pixel circuit configured to control light emission of a light-emitting diode, the pixel circuit comprising:
the light-emitting diode;
a driving transistor configured to control driving current to the light-emitting diode;
a storage capacitor directly connected to a gate of the driving transistor and being configured to store control voltage for the driving transistor;
a first switching transistor configured to connect or disconnect between the gate and a drain of the driving transistor;
a second switching transistor directly connected to a data line;
a third switching transistor electrically connecting the second switching transistor and a source of the driving transistor, the second switching transistor and the third switching transistor being configured to transfer a data signal voltage from the data line to the storage capacitor through the driving transistor and the first switching transistor;
a fourth switching transistor electrically connecting a reset power supply and an anode electrode of the light-emitting diode, and
an auxiliary capacitor directly connected to the second switching transistor and the third switching transistor, the auxiliary capacitor being configured to store auxiliary charges that depend on the data signal voltage from the data line,
wherein the auxiliary capacitor retains the auxiliary charges in accordance with the data signal voltage from the data line during a first period in a frame period where the second switching transistor, the third switching transistor and the first switching transistor are ON,
wherein the auxiliary charges are transferred from the auxiliary capacitor to the storage capacitor through the third switching transistor, the first switching transistor and the driving transistor during a second period following the first period in the frame period where the second switching transistor is OFF and the first switching transistor and the third switching transistor are ON,
wherein the auxiliary capacitor is a first auxiliary capacitor,
wherein the pixel circuit further includes a second auxiliary capacitor,
wherein the first auxiliary capacitor is connected between a power supply line provided to supply an anode current for the light-emitting diode and a node between the second switching transistor and the driving transistor,
wherein the second auxiliary capacitor is connected between the node between the second switching transistor and the driving transistor and the anode electrode of the light-emitting diode, and
wherein the fourth switching transistor is ON during the first period.
2. The pixel circuit according to claim 1 , wherein a capacitance of the auxiliary capacitor is equal to or more than a capacitance of the storage capacitor.
3. The pixel circuit according to claim 1 ,
wherein the third switching transistor is controlled by a same control signal as a control signal for the first switching transistor.
4. The pixel circuit according to claim 3 ,
wherein the driving transistor is a p-type polysilicon semiconductor transistor, and
wherein the first switching transistor, the second switching transistor, and the third switching transistor are n-type metal oxide semiconductor transistors.
5. The pixel circuit according to claim 1 , further comprising:
an electrode layer located between a semiconductor layer of the driving transistor and a substrate,
wherein the auxiliary capacitor is connected between a power supply line provided to supply an anode current for the light-emitting diode and a node between the second switching transistor and the driving transistor, and
wherein a third auxiliary capacitor is configured between the semiconductor layer of the driving transistor and the electrode layer.
6. The pixel circuit according to claim 4 , wherein the first switching transistor, the second switching transistor, and the third switching transistor have a dual-gate structure where a semiconductor layer is sandwiched by a first gate electrode and a second gate electrode.
7. The pixel circuit according to claim 1 , wherein capacitance of the auxiliary capacitor is equal to or larger than ½ of capacitance of the storage capacitor.
8. The pixel circuit according to claim 1 , wherein a sum of the first period and the second period is not less than five times and not more than ten times of the first period.
9. The pixel circuit according to claim 1 , wherein a product of a capacitance ratio of the auxiliary capacitor to the storage capacitor and a cube of a ratio of a sum of the first period and the second period to the first period is not less than 100 and not more than 700.