IP Library Granted Patent US 9,812,062
Granted Patent B2
US 9,812,062 · App. 14/735,484 · Granted Nov 7, 2017

Display apparatus and method of driving the same

Inventors: Hyungryul Kang (Yongin, KR); Cheolmin Kim (Yongin, KR)
Assignee: Samsung Display Co., Ltd.
G09G3/3258G09G2300/043G09G2300/0871G09G2300/0876G09G2310/0216G09G2320/045
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Quick Facts
Patent No.
US 9,812,062
App. No.
14/735,484
Granted
Nov 7, 2017
Kind
B2
Abstract

A display apparatus includes pixels connected to scan lines, data lines, and emission control lines. Each include includes an organic light-emitting diode (OLED), a first transistor to transfer driving current to the OLED based on a data signal, a second transistor to transfer the data signal to the first transistor based on a first scan signal having a gate-on voltage level during a data writing period, a first capacitor connected between a gate electrode of the first transistor and a first power source, and a second capacitor connected between a drain electrode of the first transistor and the first power source.

Claims (42)

1. A display apparatus, comprising:

a display unit including a plurality of pixels connected to a plurality of scan lines, a plurality of data lines, and a plurality of emission control lines, wherein each of the pixels includes:

an organic light-emitting diode (OLED);

a first transistor to transfer driving current, based on a data signal, to the OLED;

a second transistor to transfer the data signal to the first transistor based on a first scan signal having a gate-on voltage level during a data writing period;

a compensation transistor to diode-connect the first transistor based on the first scan signal having the gate-on voltage level during the data writing period;

a first capacitor connected between a gate electrode of the first transistor and a first power source; and

a second capacitor connected between a drain electrode of the first transistor and the first power source, wherein the first transistor is on-biased during an initialization period, wherein the first scan signal has the gate-on voltage level during a unit scan period before a unit scan period in which a second scan signal has the gate-on voltage level.

2. The display apparatus as claimed in claim 1 , wherein:

the gate electrode of the first transistor is connected to a first node, and

the second transistor is connected to the first node through the first transistor.

3. The display apparatus as claimed in claim 1 , wherein each of the pixels includes a third transistor to supply an initialization voltage to the gate electrode of the first transistor, in order to initialize a characteristic of the first transistor based on the second scan signal having the gate-on voltage level during the initialization period.

4. The display apparatus as claimed in claim 3 , wherein the second scan signal has the gate-on voltage level during a unit scan period immediately before the data writing period.

5. The display apparatus as claimed in claim 3 , wherein the second scan signal has the gate-on voltage level during one or more unit scan periods before the data writing period.

6. The display apparatus as claimed in claim 3 , wherein:

the second scan signal has the gate-on voltage level during two or more unit scan periods before the data writing period, and

the first scan signal has the gate-on voltage level during a unit scan period between two or more unit scan periods in which the second scan signal has the gate-on voltage level.

7. The display apparatus as claimed in claim 3 , wherein:

the second scan signal has the gate-on voltage level during two or more unit scan periods before the data writing period, and

a period between two or more unit scan periods in which the second scan signal has the gate-on voltage level is multiples of a unit scan period.

8. The display apparatus as claimed in claim 3 , wherein:

the first scan signal has the gate-on voltage level during one or more unit scan periods before the data writing period, and

the second scan signal has the gate-on voltage level during a unit scan period immediately before a unit scan period in which the first scan signal has the gate-on voltage level before the data writing period and/or a unit scan period immediately after a unit scan period in which the first scan signal has the gate-on voltage level.

9. The display apparatus as claimed in claim 3 , wherein the initialization period is prior to the data writing period.

10. The display apparatus as claimed in claim 1 , wherein each of the pixels includes a transistor to supply the initialization voltage to an anode electrode of the OLED based on a third scan signal.

11. The display apparatus as claimed in claim 10 , wherein the third scan signal is equal to the first scan signal.

12. The display apparatus as claimed in claim 1 , wherein each of the pixels includes a transistor to turn on based on an emission control signal and a transistor connected to the second capacitor in parallel.

13. The display apparatus as claimed in claim 1 , wherein each of the pixels includes a transistor to connect the first transistor to the OLED based on an emission control signal.

14. The display apparatus as claimed in claim 1 , further comprising:

a scan driver to transfer scan signals through the scan lines;

a data driver to transfer data signals through the data lines; and

an emission driver to transfer emission control signals through the emission control lines.

15. A method for driving a display apparatus, the method comprising:

initializing a characteristic of a driving transistor and setting the driving transistor in an on-biased state during an initialization period;

compensating for a threshold voltage of the driving transistor and transferring a data signal to the driving transistor based on a first scan signal; and

emitting light from the OLED based on driving current corresponding to the data signal, wherein initializing the characteristic includes:

transferring the first scan signal having a gate-on voltage level at least one time; and

transferring a second scan signal having the gate-on voltage level at least one time, wherein the first scan signal has the gate-on voltage level during a unit scan period before a unit scan period in which the second scan signal has the gate-on voltage level.

16. The method as claimed in claim 15 , wherein the first scan signal has the gate-on voltage level during a unit scan period between two or more unit scan periods in which the second scan signal has the gate-on voltage level.

17. The method as claimed in claim 15 , wherein:

the second scan signal has the gate-on voltage level during two or more unit scan periods, and

a period between two or more unit scan periods in which the second scan signal has the gate-on voltage level is multiples of a unit scan period.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 10, 2015
From: KANG, HYUNGRYUL; KIM, CHEOLMIN
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 035816/0001 →
Priority Claims (1)
KR 10-2014-0157334 · Nov 12, 2014 · national
Continuity (1)
Related Publication 20160133191A1 · May 12, 2016