IP Library Granted Patent US 11,744,111
Granted Patent B2
US 11,744,111 · App. 17/839,864 · Granted Aug 29, 2023

Display device

Inventor: Satoshi Maruyama (Minato-ku, JP)
Assignee: Japan Display Inc.
H10K59/1213H01L27/1225H01L27/1251H01L27/1255H01L27/1259H10K59/1216H10K59/131H01L27/0688H01L27/124H01L27/1222H01L27/1262H01L29/66757H01L29/66969H01L29/7869H01L29/78675H10K59/1201
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Quick Facts
Patent No.
US 11,744,111
App. No.
17/839,864
Granted
Aug 29, 2023
Kind
B2
Abstract

A plurality of thin film transistors provided in a peripheral region are first staggered thin film transistors where a first channel layer configured of low-temperature polysilicon is included, and the first channel layer is not interposed between a first source electrode and a first gate electrode, and between a first drain electrode and the first gate electrode. A plurality of thin film transistors provided in a display region are second staggered thin film transistors where a second channel layer configured of an oxide semiconductor is included, and the second channel layer is not interposed between a second source electrode and a second gate electrode, and between a second drain electrode and the second gate electrode. The first thin film transistor is located below the second thin film transistor.

Claims (13)

1. A display device comprising:

a pixel electrode that is provided in a display region configured to display an image;

a common electrode that is disposed above the pixel electrode;

a light-emitting element layer that is interposed between the pixel electrode and the common electrode;

a first thin film transistor including a first gate electrode coupled to the pixel electrode in the display region, no other transistor being coupled between the first thin film transistor and the pixel electrode;

a first conductive layer that is provided under and overlaps with the first thin film transistor;

a circuit layer that is provided in a peripheral region outside the display region; and

a second thin film transistor including a second gate electrode in the circuit layer,

wherein a first channel of the first thin film transistor is made of an oxide semiconductor, and the second thin film transistor is positioned at a lower layer in comparison with the first thin film transistor, and the second gate electrode is in the same layer as the first conductive layer.

2. The display device according to claim 1 , wherein a second channel layer of the second thin film transistor is made of a portion of a low-temperature poly silicon layer.

3. The display device according to claim 2 , further comprising a second conductive layer that is composed of another portion of the low-temperature polysilicon layer with ions injected therein in the display region, wherein the first conductive layer overlaps the second conductive layer.

4. The display device according to claim 3 , wherein the second conductive layer is in the same layer as the second channel layer.

5. The display device according to claim 2 , further comprising a second conductive layer that is formed by injecting ions into the low-temperature polysilicon layer in the display region, wherein the first conductive layer overlaps the second conductive layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 22, 2025
From: JAPAN DISPLAY INC.
To: MAGNOLIA WHITE CORPORATION
Reel/Frame 072130/0313 →
Priority Claims (1)
JP 2016-058455 · Mar 23, 2016 · national
Continuity (4)
Continuation 17109369 · Dec 2, 2020
Division 16263635 · Jan 31, 2019
Continuation 15426606 · Feb 7, 2017
Related Publication 20220310735A1 · Sep 29, 2022
Cited By (3)
US 12,396,328 US 12,682,818 US 12,696,637