IP Library Granted Patent US 11,854,998
Granted Patent B2
US 11,854,998 · App. 17/853,593 · Granted Dec 26, 2023

Semiconductor device and method of manufacture

Inventors: Jing-Cheng Lin (Hsinchu, TW); Chen-Hua Yu (Hsinchu, TW); Po-Hao Tsai (Taoyuan, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
H01L23/544H01L23/3135H01L24/19
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,854,998
App. No.
17/853,593
Granted
Dec 26, 2023
Kind
B2
Abstract

A semiconductor device has a conductive via laterally separated from the semiconductor, an encapsulant between the semiconductor device and the conductive via, and a mark. The mark is formed from characters that are either cross-free characters or else have a overlap count of less than two. In another embodiment the mark is formed using a wobble scan methodology. By forming marks as described, defects from the marking process may be reduced or eliminated.

Claims (27)

1. A semiconductor device comprising:

a first semiconductor device separated from a through via by an encapsulant, wherein a protective layer is located over the first semiconductor device and wherein the through via has multiple surfaces planar with the first semiconductor device; and

a circular path traced across the protective layer by a plurality of circular indentations, wherein each of the plurality of circular indentations has a diameter of less than about 100 μm.

2. The semiconductor device of claim 1 , wherein the circular path has a crossing distance of between about 50 μm and about 200 μm.

3. The semiconductor device of claim 2 , wherein the circular path has a crossing distance of between about 50 μm and about 100 μm.

4. The semiconductor device of claim 1 , wherein the circular path has a variable crossing distance.

5. The semiconductor device of claim 1 , wherein the plurality of circular indentations at least partially overlap each other.

6. The semiconductor device of claim 1 , wherein the circular path forms a line, the line having a dot width of between about 80 μm and about 200 μm.

7. The semiconductor device of claim 6 , wherein the line has an overlap count greater than two.

8. A semiconductor device comprising:

a protective layer located over a first semiconductor device, the first semiconductor device being encapsulated by an encapsulant;

through vias extending through the encapsulant, wherein at least one of the through vias has a straight sidewall that extends from a first side of the encapsulant to a second side of the encapsulant opposite the first side; and

a plurality of circular indentations extending into the protective layer and having a diameter of less than about 100 μm, the plurality of circular indentations located along a circular path traced across the protective layer by the plurality of circular indentations.

9. The semiconductor device of claim 8 , wherein the circular path forms a line.

10. The semiconductor device of claim 9 , wherein the circular path has a crossing distance within the line of between about 50 μm and about 200 μm.

11. The semiconductor device of claim 10 , wherein the circular path has a crossing distance within the line of between about 50 μm and about 100 μm.

12. The semiconductor device of claim 9 , wherein the line has a variable crossing distance.

13. The semiconductor device of claim 9 , wherein the line has a dot width of between about 8 μm and about 150 μm.

14. The semiconductor device of claim 8 , wherein the circular indentations have a diameter of between about 20 μm and about 50 μm.

15. A semiconductor device comprising:

an encapsulant encapsulating a first semiconductor die and a through via; and

a protective layer overlying at least the first semiconductor die and the encapsulant, wherein a top surface of the protective layer comprises multiple overlapping indentations, each one of the multiple overlapping indentations being circular in shape and having a diameter of no greater than about 100 μm, the multiple overlapping indentations forming a curved line, the curved line having a dot width that is greater than the diameter.

16. The semiconductor device of claim 15 , further comprising a redistribution layer located across the encapsulant from the protective layer.

17. The semiconductor device of claim 15 , wherein the multiple overlapping indentations wobble through a centerline of a line.

18. The semiconductor device of claim 17 , wherein the line has a dot width between about 80 μm and about 200 μm.

19. The semiconductor device of claim 15 , wherein each of the multiple overlapping indentations has a diameter of between about 20 μm and about 50 μm.

20. The semiconductor device of claim 15 , wherein the through via is recessed within the encapsulant.

Continuity (5)
Continuation 17079704 · Oct 26, 2020
Continuation 16518568 · Jul 22, 2019
Continuation 15670187 · Aug 7, 2017
Continuation 14857939 · Sep 18, 2015
Related Publication 20220328421A1 · Oct 13, 2022