IP Library › Granted Patent US 12,394,714
Granted Patent B2
US 12,394,714 · App. 17/858,100 · Granted Aug 19, 2025

Semiconductor device including dielectric insert structure directly under buried word line and method for forming the same

Inventors: Yu-Cheng Tung (Quanzhou, CN); Janbo Zhang (Quanzhou, CN)
Assignee: Fujian Jinhua Integrated Circuit Co., Ltd.
H01L23/5283H01L21/76224H01L23/5226H01L23/53295H10B12/053H10B12/34H10B12/488
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Quick Facts
Patent No.
US 12,394,714
App. No.
17/858,100
Granted
Aug 19, 2025
Kind
B2
Abstract

A semiconductor device includes a substrate having a plurality of parallel active regions, an isolation structure in the substrate to separate the active regions, a buried word line disposed in the substrate and cutting through the isolation structure and the active regions, and a dielectric insert structure disposed in the substrate, directly under the buried word line and between end portions of adjacent two of the active regions. A bottom surface of the dielectric insert structure is lower than a bottom surface of the isolation structure.

Claims (47)

1. A semiconductor device, comprising:

a substrate of a first conductivity type, comprising a plurality of active regions arranged adjacent to each other to form an array;

an isolation structure in the substrate to separate the active regions;

a buried word line disposed in the substrate and cutting through the isolation structure and the active regions;

a dielectric insert structure disposed in the substrate, directly under the buried word line and between end portions of adjacent two of the active regions, wherein the dielectric insert structure comprises dopants of a second conductivity type that is opposite to the first conductivity type; and

a doped region in the substrate and directly contacting a sidewall and a bottom surface of the dielectric insert structure, wherein the doped region has the second conductivity type.

2. The semiconductor device according to claim 1 , wherein the isolation structure and the dielectric insert structure comprise different materials.

3. The semiconductor device according to claim 1 , wherein a bottom surface of the isolation structure is lower than a bottom surface of the buried word line.

4. The semiconductor device according to claim 1 , wherein a sidewall of the dielectric insert structure directly contacts the isolation structure.

5. The semiconductor device according to claim 1 , wherein the buried word line comprises:

a gate dielectric layer, being in direct contact with the dielectric insert structure;

a conductive layer disposed on the gate dielectric layer; and

a capping layer disposed on the conductive layer.

6. The semiconductor device according to claim 1 , wherein a width of the dielectric insert structure is smaller than a width of the buried word line.

7. The semiconductor device according to claim 1 , wherein a width of the dielectric insert structure is larger than a width of the buried word line.

8. The semiconductor device according to claim 1 , wherein a sidewall of the dielectric insert structure and a direction along a surface of the substrate comprise an angle of 54.7 degrees.

9. A method for forming a semiconductor device, comprising:

providing a substrate of a first conductivity type;

forming an isolation trench in the substrate to define a plurality of active regions;

forming a first dielectric layer in the isolation trench and comprising a plurality of deep holes that are respectively located between end portions of adjacent two of the active regions;

performing an etching process to extend each of the deep holes into the substrate and being lower than a bottom surface of the isolation trench;

forming a second dielectric layer filling the deep holes, wherein the second dielectric layer comprises dopants of a second conductivity type;

forming a word line trench in the substrate and cutting through the active regions, the first dielectric layer, and the second dielectric layer, wherein portions of the second dielectric layer at bottom portions of the deep holes become a plurality of dielectric insert structures under the word line trench;

forming a doped region of the second conductivity type in the substrate and directly contacting a sidewall and a bottom surface of the dielectric insert structure, wherein the second conductivity type that is opposite to the first conductivity type; and

forming a buried word line in the word line trench.

10. The method for forming a semiconductor device according to claim 9 , wherein the first dielectric layer and the second dielectric layer comprise different materials.

11. The method for forming a semiconductor device according to claim 9 , wherein a bottom surface of the isolation trench is lower than a bottom surface of the word line trench.

12. The method for forming a semiconductor device according to claim 9 , wherein the etching process comprises:

a dry etching step to remove the first dielectric layer at bottom portions of the deep holes to expose portions of the substrate; and

a wet etching step to etch the exposed portions of the substrate.

13. The method for forming a semiconductor device according to claim 9 , wherein the step of forming the buried word line comprises:

forming a gate dielectric layer along a bottom surface and a sidewall of the word line trench, wherein the gate dielectric layer is in direct contact with the plurality of dielectric insert structures;

forming a conductive layer on the gate dielectric layer; and

forming a capping layer on the conductive layer.

14. The method for forming a semiconductor device according to claim 9 , wherein a width of the dielectric insert structures is smaller than a width of the buried word line.

15. The method for forming a semiconductor device according to claim 9 , wherein a width of the dielectric insert structures is larger than a width of the buried word line.

16. The method for forming a semiconductor device according to claim 9 , wherein the bottom portions of the deep holes extending into the substrate respectively have a rhombus-shaped or diamond-shaped cross-sectional profile.

17. A method for forming a semiconductor device, comprising:

providing a substrate;

forming an isolation trench in the substrate to define a plurality of active regions;

forming a first dielectric layer in the isolation trench and comprising a plurality of deep holes that are respectively located between end portions of adjacent two of the active regions;

performing an etching process to extend each of the deep holes into the substrate and being lower than a bottom surface of the isolation trench, wherein the etching process comprises:

a dry etching step to remove the first dielectric layer at bottom portions of the deep holes to expose portions of the substrate; and

a wet etching step to etch the exposed portions of the substrate;

forming a second dielectric layer filling the deep holes;

forming a word line trench in the substrate and cutting through the active regions, the first dielectric layer, and the second dielectric layer, wherein portions of the second dielectric layer at bottom portions of the deep holes become a plurality of dielectric insert structures under the word line trench; and

forming a buried word line in the word line trench.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 6, 2022
From: TUNG, YU-CHENG; ZHANG, JANBO
To: FUJIAN JINHUA INTEGRATED CIRCUIT CO., LTD.
Reel/Frame 060405/0975 →
Priority Claims (2)
CN 202210406371.4 · Apr 18, 2022 · national
CN 202220894082.9 · Apr 18, 2022 · national
Continuity (1)
Related Publication 20230335491A1 · Oct 19, 2023
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