Method and apparatus to enable individual non volatile memory express (NVME) input/output (IO) queues on differing network addresses of an NVME controller
Methods and apparatus related to enabling individual NVMe (Non-Volatile Memory express) IO (Input Output or I/O) queues on differing network addresses of an NVMe controller are described. In one embodiment, a plurality of backend controller logic is coupled to a plurality of non-volatile memory devices. One or more virtual controller target logic (coupled to the plurality of backend controller logic) transmit data from a first portion of a plurality of IO queues to a first backend controller logic of the plurality of the backend controller logic. The one or more virtual controller target logic transmit data from a second portion of the plurality of IO queues to a second backend controller logic of the plurality of backend controller logic. Other embodiments are also disclosed and claimed.
1. An apparatus comprising:
circuitry to provide a requester with access to at least one Non-Volatile Memory express (NVMe) compatible target device, wherein the at least one NVMe compatible target device is to operate consistent at least with a Non-Volatile Memory Express Specification;
circuitry to process a request from the requester to communicate with the at least one NVMe compatible target device; and
an interface to transmit the request in at least one Ethernet packet to at least one target device associated with the at least one NVMe compatible target device, wherein the request comprises an NVMe administrative command and the NVMe administrative command comprises one or more of: Create Submission/Completion IO Queues, or Identify Controller.
2. The apparatus of claim 1 , wherein the at least one NVMe compatible target device is associated with one or more physical NVMe compatible controllers associated with one or more volatile or non-volatile memory devices.
3. The apparatus of claim 1 , wherein the at least one NVMe compatible target device is identified to the requester as a single NVMe device and wherein the transmit the request in the at least one Ethernet packet to the target device associated with the at least one NVMe compatible target device comprises transmit the request to multiple NVMe devices.
4. The apparatus of claim 1 , wherein the interface is to transmit the request to the at least one NVMe compatible target device over a fabric.
5. The apparatus of claim 4 , wherein the transmit the request is compatible with one or more of: Remote Direct Memory Access (RDMA), Fibre Channel, and/or Ethernet.
6. The apparatus of claim 1 , wherein the at least one target device comprises multiple NVMe compatible target devices and wherein the interface is to transmit the request to the multiple NVMe compatible target devices.
7. The apparatus of claim 1 , wherein the at least one NVMe compatible target device is to provide access to at least one admin queue and at least one IO queue.
8. A method comprising:
providing access to at least one Non-Volatile Memory express (NVMe) compatible target device, wherein the at least one NVMe compatible target device is to operate consistent at least with a Non-Volatile Memory Express Specification;
processing a request from a requester to communicate with the at least one NVMe compatible target device; and
transmitting the request in at least one Ethernet packet to at least one target device associated with the at least one NVMe compatible target device, wherein the request comprises an NVMe administrative command and the NVMe administrative command comprises one or more of: Create Submission/Completion IO Queues, or Identify Controller.
9. The method of claim 8 , wherein the at least one NVMe compatible target device is associated with one or more physical NVMe compatible controllers associated with one or more volatile or non-volatile memory devices.
10. The method of claim 8 , wherein the transmitting the request in at least one Ethernet packet to at least one target device associated with the at least one NVMe compatible target device comprises transmitting the request in the at least one Ethernet packet to at least one target device associated with the at least one NVMe compatible target device over a fabric.
11. The method of claim 10 , wherein the transmitting the request is compatible with one or more of: Remote Direct Memory Access (RDMA), Fibre Channel, or Ethernet.
12. The method of claim 8 , wherein the at least one target device comprises multiple NVMe compatible target devices and wherein the transmitting the request comprises transmitting the request to the multiple NVMe compatible target devices.
13. The method of claim 8 , wherein the at least one NVMe compatible target device provides access to at least one admin queue and at least one IO queues.
14. A system comprising:
a host computing system comprising:
at least one memory;
at least one processor to:
execute a requester software; and
circuitry to:
provide access, to the requester software, to at least one Non-Volatile Memory express (NVMe) compatible target device, wherein the at least one NVMe compatible target device is to operate consistent at least with a Non-Volatile Memory Express Specification,
process a request from the requester software to communicate with the at least one NVMe compatible target device; and
an interface to transmit the request in at least one Ethernet packet to at least one target device associated with the at least one NVMe compatible target device, wherein the request comprises an NVMe administrative command and the NVMe administrative command comprises one or more of: Create Submission/Completion IO Queues, or Identify Controller.
15. The system of claim 14 , wherein the at least one NVMe compatible target device is associated with one or more physical NVMe compatible controllers associated with one or more volatile or non-volatile memory devices.
16. The system of claim 15 , wherein the non-volatile memory is to comprise one or more of: nanowire memory, Ferro-electric Transistor Random Access Memory (FeTRAM), Magnetoresistive Random Access Memory (MRAM), flash memory, Spin Torque Transfer Random Access Memory (STTRAM), Resistive Random Access Memory, byte addressable 3-Dimensional Cross Point Memory, PCM (Phase Change Memory), and volatile memory backed by a power reserve to retain data during power failure or power disruption.
17. The system of claim 14 , wherein the interface is to transmit the request to the at least one NVMe compatible target device over a fabric and the transmit the request is compatible with one or more of: Remote Direct Memory Access (RDMA), Fibre Channel, or Ethernet.