Method for forming semiconductor device structure with nanostructure

1. A method for forming a semiconductor device structure, comprising:

providing a substrate, a first nanostructure, a second nanostructure, a metal gate stack, and a spacer structure, wherein the first nanostructure is between the second nanostructure and the substrate, the metal gate stack surrounds the first nanostructure and the second nanostructure, and the spacer structure surrounds an upper portion of the metal gate stack over the second nanostructure;

removing the upper portion of the metal gate stack to form a first trench in the spacer structure; and

removing a first portion of the second nanostructure through the first trench after removing the upper portion of the metal gate stack.

2. The method for forming the semiconductor device structure as claimed in claim 1 , wherein the removing of the first portion of the second nanostructure through the first trench forms a second trench in the second nanostructure, and the method further comprises:

forming a dielectric structure in the first trench and the second trench.

3. The method for forming the semiconductor device structure as claimed in claim 2 , wherein the first trench of the spacer structure and the second trench of the second nanostructure are filled up with the dielectric structure.

4. The method for forming the semiconductor device structure as claimed in claim 2 , wherein the second trench of the second nanostructure is partially under the spacer structure, and the dielectric structure is partially under the spacer structure.

5. The method for forming the semiconductor device structure as claimed in claim 4 , wherein the dielectric structure is in direct contact with a bottom surface of the spacer structure.

6. The method for forming the semiconductor device structure as claimed in claim 4 , further comprising:

before removing the upper portion of the metal gate stack, providing a first source/drain structure and a second source/drain structure over the substrate, wherein the metal gate stack is between the first source/drain structure and the second source/drain structure, and both of the first source/drain structure and the second source/drain structure surround the first nanostructure and the second nanostructure.

7. The method for forming the semiconductor device structure as claimed in claim 6 , wherein the second trench of the second nanostructure is partially in the first source/drain structure, and the dielectric structure is partially in the first source/drain structure.

8. The method for forming the semiconductor device structure as claimed in claim 7 , wherein the second trench of the second nanostructure is partially in the second source/drain structure, and the dielectric structure is partially in the second source/drain structure.

9. The method for forming the semiconductor device structure as claimed in claim 1 , further comprising:

providing a third nanostructure between the first nanostructure and the second nanostructure, wherein the metal gate stack further surrounds the third nanostructure, and the method further comprises:

after removing the first portion of the second nanostructure, removing a second portion of the metal gate stack originally between the second nanostructure and the third nanostructure.

10. The method for forming the semiconductor device structure as claimed in claim 9 , wherein the removing of the first portion of the second nanostructure through the first trench forms a second trench in the second nanostructure, and the method further comprises:

removing a third portion of the third nanostructure to form a third trench in the third nanostructure through the first trench of the spacer structure after removing the second portion of the metal gate stack.

11. The method for forming the semiconductor device structure as claimed in claim 10 , further comprising:

after removing the third portion of the third nanostructure, partially removing the metal gate stack originally between the first nanostructure and the third nanostructure; and

forming a dielectric structure in the first trench of the spacer structure, the second trench of the second nanostructure, and the third trench of the third nanostructure.

12. A method for forming a semiconductor device structure, comprising:

providing a substrate, a first nanostructure, a gate stack, and a spacer structure, wherein the gate stack surrounds the first nanostructure, and the spacer structure surrounds an upper portion of the gate stack over the first nanostructure;

removing the upper portion of the gate stack to form a first trench in the spacer structure;

removing a first portion of the first nanostructure to form a second trench in the first nanostructure through the first trench after removing the upper portion of the gate stack; and

forming a dielectric structure in the first trench and the second trench, wherein the dielectric structure has a void, and the void is between the spacer structure and the substrate.

13. The method for forming the semiconductor device structure as claimed in claim 12 , further comprising:

providing a second nanostructure between the first nanostructure and the substrate, wherein the gate stack further surrounds the second nanostructure.

14. The method for forming the semiconductor device structure as claimed in claim 13 , wherein the first nanostructure is divided into a first part and a second part by the second trench, and the void is between the first part and the second part.

15. The method for forming the semiconductor device structure as claimed in claim 14 , further comprising:

before removing the upper portion of the gate stack, providing a first source/drain structure and a second source/drain structure over the substrate, wherein the gate stack is between the first source/drain structure and the second source/drain structure, both of the first source/drain structure and the second source/drain structure surround the first nanostructure and the second nanostructure, and the first source/drain structure and the second source/drain structure respectively surround the first part and the second part of the first nanostructure.

16. The method for forming the semiconductor device structure as claimed in claim 15 , wherein the void extends into the first source/drain structure.

17. A method for forming a semiconductor device structure, comprising:

providing a substrate, a first nanostructure, a second nanostructure, a metal gate stack, a first source/drain structure, and a second source/drain structure, wherein the first nanostructure is between the second nanostructure and the substrate, the metal gate stack surrounds the first nanostructure and the second nanostructure, the metal gate stack, the first nanostructure, and the second nanostructure are between the first source/drain structure and the second source/drain structure;

removing an upper portion of the metal gate stack over the second nanostructure; and

removing the second nanostructure after removing the upper portion of the metal gate stack.

18. The method for forming the semiconductor device structure as claimed in claim 17 , wherein the removing of the second nanostructure forms a gap between the first source/drain structure and the second source/drain structure, and the method further comprises:

forming a dielectric structure in the gap.

19. The method for forming the semiconductor device structure as claimed in claim 18 , wherein the dielectric structure is in direct contact with the first source/drain structure.

20. The method for forming the semiconductor device structure as claimed in claim 18 , wherein the dielectric structure is in direct contact with the metal gate stack.