Memory module adapter card with multiplexer circuitry
A memory module adapter card can adapt multiple compression-attached memory modules (CAMMs) to a dual inline memory module (DIMM) connector. Multiplexer circuitry on the adapter card enables multiplexing data amongst the memory modules attached to the adapter card during a same burst access sequence.
1 . A system comprising:
a printed circuitry board (PCB);
a processor mounted on the PCB, the processor coupled with a memory controller;
a dual-inline memory module (DIMM) connector mounted to the PCB, the DIMM connector to include contacts arranged to electrically couple with input/output (I/O) interface circuitry of the memory controller; and
an adaptor card, the adaptor card to include:
first conductive contacts proximate to an edge of the adaptor card, the edge of the adaptor card arranged to be received by the DIMM connector, the first conductive contacts configured to couple with contacts included in the DIMM connector;
second conductive contacts on a first face of the adaptor card configured to couple with a first compression attached memory module (CAMM) and to enable a communicative coupling between the I/O interface circuitry of the memory controller and the first CAMM through the first and second conductive contacts;
third conductive contacts on a second face of the adaptor card configured to couple with a second CAMM and to enable a communicative coupling between the I/O interface circuitry of the memory controller and the second CAMM through the first and third conductive contacts; and
multiplexor circuitry configured to time multiplex data access between the first CAMM and the second CAMM to enable the first CAMM to be accessed in parallel with the second CAMM being made ready for access during a first timing cycle then enable the second CAMM to be accessed in parallel with the first CAMM being ready for access during a second, subsequent timing cycle.
2 . The system of claim 1 , further comprising:
the first CAMM; and
the second CAMM.
3 . An adaptor card comprising:
first conductive contacts proximate to an edge of the adaptor card, the edge of the adaptor card arranged to be received by a dual-inline memory module (DIMM) connector mounted to a printed circuitry board (PCB), the first conductive contacts configured to couple with contacts of the DIMM connector when the edge of the adaptor card is received in the DIMM connector;
second conductive contacts on a first face of the adaptor card configured to couple with a first compression attached memory module (CAMM);
third conductive contacts on a second face of the adaptor card configured to couple with a second CAMM; and
multiplexor circuitry configured to time multiplex data access between the first CAMM and the second CAMM to enable the first CAMM to be accessed in parallel with the second CAMM being made ready for access during a first timing cycle then enable the second CAMM to be accessed in parallel with the first CAMM being ready for access during a second, subsequent timing cycle.
4 . The adaptor card of claim 3 , wherein the multiplexor circuitry is further configured to:
receive write data from a host at a first frequency; and
send demultiplexed write data to the first CAMM and the second CAMM at a second frequency that is slower than the first frequency.
5 . The adaptor card of claim 4 , wherein the multiplexor circuitry is further configured to:
send the demultiplexed write data to the first CAMM with a phase shift relative to the demultiplexed write data sent to the second CAMM.
6 . The adaptor card of claim 4 , wherein the multiplexor circuitry is further configured to:
send the demultiplexed write data to the first CAMM and the second CAMM at a same time.
7 . The adaptor card of claim 3 , wherein the multiplexor circuitry is further configured to:
time multiplex the data access between the first CAMM and the second CAMM during a same burst write sequence or a same burst read sequence.
8 . The adaptor card of claim 3 , further comprising:
a first compression mount technology (CMT) connector mounted on the first face of the adaptor card, the first CMT connector configured to house the second conductive contacts; and
a second CMT connector mounted on the second face of the adaptor card, the second CMT connector configured to house the third conductive contacts.
9 . The adaptor card of claim 3 , further comprising:
the first CAMM; and
the second CAMM.
10 . The system of claim 1 , wherein the adaptor card multiplexor circuitry is further configured to:
receive write data from the memory controller at a first frequency; and
send demultiplexed write data to the first CAMM and the second CAMM at a second frequency that is slower than the first frequency.
11 . The system of claim 10 , wherein the adaptor card multiplexor circuitry is further configured to:
send the demultiplexed write data to the first CAMM with a phase shift relative to the demultiplexed write data sent to the second CAMM.
12 . The system of claim 10 , wherein the adaptor card multiplexor circuitry is further configured to:
send the demultiplexed write data to the first CAMM and the second CAMM at a same time.
13 . The system of claim 1 , wherein the adaptor card multiplexor circuitry is further configured to:
time multiplex the data access between the first CAMM and the second CAMM during a same burst write sequence or a same burst read sequence.
14 . The system of claim 1 , wherein the adaptor card further includes:
a first compression mount technology (CMT) connector mounted on the first face of the adaptor card, the first CMT connector configured to house the second conductive contacts; and
a second CMT connector mounted on the second face of the adaptor card, the second CMT connector configured to house the third conductive contacts.