Systems, devices, and methods for selective communication through an electrical connector
Electrical systems and related methods are disclosed. An electrical system comprises an electronic device configured to communicate through an electrical connector using one of a plurality of different communication protocols responsive to receiving an indication of the one of the plurality of different communication protocols through the electrical connector from another electronic device. The other electronic device is configured to provide a protocol indicator that indicates a particular communication protocol with which the other electronic device is configured to communicate through an electrical connector of the electronic device. A method includes receiving a protocol indicator from another electronic device through an electrical connector. The protocol indicator indicates a communication protocol. The method also includes communicating with the other electronic device through the electrical connector using the indicated communication protocol.
1. An electrical system, comprising an electronic device configured to communicate through a memory socket using one of a plurality of different communication protocols by coupling one or more of a plurality of communication pins of the memory socket to a communication module associated with one of the plurality of different communication protocols responsive to receiving an indication of the plurality of different communication protocols through a type pin of the memory socket from another electronic device,
wherein one or more of the communication pins are mating pins configured to interface with the other electronic device, the mating pins configured to:
receive a presence detect signal from the other electronic device to enable the electronic device to detect the other electronic device; and
contact connector pins of the other electronic device after other pins of the plurality of communication pins contact other pins of the other electronic device.
2. The electrical system of claim 1 , wherein the electronic device includes a computer interface board comprising the memory socket and a central processing unit (CPU).
3. The electrical system of claim 2 , wherein the computer interface board further comprises a chipset programmed to receive the indication of the one of the plurality of different communication protocols and activate a communication module corresponding to the one of the plurality of different communication protocols.
4. The electrical system of claim 1 , wherein the memory socket comprises a dual in-line memory module (DIMM) socket.
5. The electrical system of claim 1 , wherein the plurality of different communication protocols comprises a serial advanced technology attachment (SATA) protocol and a memory protocol.
6. The electrical system of claim 1 , wherein the plurality of different communication protocols comprises a peripheral component interconnect express (PCIe) protocol and a memory protocol.
7. The electrical system of claim 1 , wherein the plurality of different communication protocols comprises a serial attached SCSI (SAS) protocol and a memory protocol.
8. The electrical system of claim 1 , wherein the plurality of different communication protocols comprises a serial advanced technology attachment (SATA) protocol, a peripheral component interconnect express (PCIe) protocol, and a memory protocol.
9. The electrical system of claim 1 , wherein the plurality of different communication protocols comprises a memory protocol and one or more communication protocols selected from the group consisting of a serial advanced technology attachment (SATA) protocol, a peripheral component interconnect express (PCIe) protocol, and a serial attached SCSI (SAS) protocol.
10. The electrical system of claim 1 , wherein the plurality of different communication protocols comprises two or more different types of memory interfaces.
11. The electrical system of claim 1 , wherein the plurality of different communication protocols comprises two or more different types of memory interfaces and one or more communication protocols selected from the group consisting of a serial advanced technology attachment (SATA) protocol, a peripheral component interconnect express (PCIe) protocol and a serial attached SCSI (SAS) protocol.
12. The electrical system of claim 1 , wherein the plurality of different communication protocols comprises at least one of a serial attached SCSI (SAS) protocol and a QuickPath Interconnect (QPI) protocol.
13. The electrical system of claim 1 , wherein the electronic device comprises a plurality of different communication modules, each of the plurality of different communication modules corresponding to a different one of the plurality of different communication protocols, and each of the plurality of different communication modules operably coupled to a switching device configured to receive the indication of the one of the plurality of different communication protocols and couple the one of the plurality of different communication modules that corresponds to the one of the plurality of different communication protocols to the memory socket.
14. A method of operating an electrical system, the method comprising:
receiving a second electronic device into a memory socket;
detecting an insertion of the second electronic device into the memory socket by receiving at least a first presence detect signal near a first side of the memory socket, and receiving at least a second presence detect signal near a second side of the memory socket that is opposite the first side
disabling communication between the first electronic device and the second electronic device by keeping communication between the first electronic device and the second electronic device disabled for a predetermined time after both the first presence detect signal and the second presence detect signal are received;
enabling communication between the first electronic device and the second electronic device;
receiving a protocol indicator at the first electronic device from the second electronic device through a memory socket, the protocol indicator indicating a communication protocol of a plurality of different communication protocols with which the second electronic device is configured to communicate through the memory socket; and
communicating with the second electronic device through the memory socket using the indicated communication protocol.
15. The method of claim 14 , wherein communicating with the second electronic device through the memory socket using the indicated communication protocol comprises coupling one of a plurality of communication modules that corresponds to the indicated communication protocol to the memory socket with a switching device, wherein each of the plurality of communication modules corresponds to one of the plurality of different communication protocols.
16. The method of claim 14 , wherein communicating with the second electronic device through the memory socket using the indicated communication protocol comprises activating one of a plurality of communication modules that corresponds to the indicated communication protocol, wherein each of the communication modules corresponds to one of the plurality of different communication protocols, and wherein each of the plurality of communication modules is operably coupled to the memory socket.
17. The method of claim 14 , wherein communicating with the second electronic device through the memory socket using the indicated communication protocol comprises communicating with a solid state drive through the memory socket using a communication protocol selected from the group consisting of a serial advance technology attachment (SATA) protocol, a peripheral component interconnect express (PCIe) protocol, and a serial attached SCSI (SAS) protocol.
18. The method of claim 14 , further comprising:
operating the second electronic device without powering down the electronic device.
19. The method of claim 18 , wherein disabling communication between the electronic device and the second electronic device comprises disabling a protocol selector configured to enable the electronic device to communicate through the memory socket using the indicated communication protocol.
20. An electronic device, comprising:
a protocol indicator generator configured to provide a protocol indicator to another electronic device through an electrical connector of a memory socket of the other electronic device, the protocol indicator indicating a particular communication protocol with which the electronic device is configured to communicate;
a communication module configured to communicate with the other electronic device through the electrical connector using the particular communication protocol; and
a mating connector configured to interface with the electrical connector, the mating connector comprising one or more pins having two pins located at opposite sides of the mating connector, and the one or more pins configured to:
output a presence detect signal to the other electronic device through the electrical connector to enable the other electronic device to detect the electronic device, and
contact mating pins of the electrical connector after other pins of the mating connector contact other mating pins of the electrical connector, and
one or more protocol indicating pins for outputting the protocol indicator, wherein each of the one or more protocol indicating pins is tied to one of a high power signal defining a logic level high and a low power signal defining a logic level low in an arrangement that indicates the particular communication protocol.
21. The electronic device of claim 20 , further comprising a solid state drive configured to communicate using a communication protocol selected from the group consisting of a PCIe protocol, a SATA protocol, and a SAS protocol with a computer interface board through the memory socket of the computer interface board.
22. The electronic device of claim 21 , wherein the solid state drive is configured to transfer stored data to a memory device of the computer interface board using direct memory access (DMA) where the stored data can be operated on by a central processing unit (CPU) of the computer interface board.
23. The electronic device of claim 21 , wherein the solid state drive is configured to send interrupt messages to a central processing unit (CPU) of the computer interface board through the memory socket.