Generating high dynamic voltage boost
Devices, systems, and methods are provided for generating a high, dynamic voltage boost. An integrated circuit (IC) includes a driving circuit having a first stage and a second stage. The driving circuit is configured to provide an overdrive voltage. The IC also includes a charge pump circuit coupled between the first stage and the second stage. The charge pump circuit is configured generate a dynamic voltage greater than the overdrive voltage. The IC also includes a bootstrap circuit coupled to the charge pump circuit, configured to further dynamically boost the overdrive voltage of the driving circuit.
1 . An integrated circuit comprising:
a driving circuit having a first stage and a second stage and configured to provide an overdrive voltage, wherein the first stage and the second stage have a shared voltage input, the first stage has a depletion-mode transistor and an enhanced-mode transistor, and the second stage comprises a pair of enhanced-mode transistors;
an internal bootstrap circuit coupled to the driving circuit and configured to increase the overdrive voltage of the driving circuit based on an output voltage of a charge pump circuit; and
an external bootstrap circuit having a diode coupled to the second stage and a capacitor coupled between the diode and a reference voltage pin.
2 . The integrated circuit of claim 1 , further comprising a power transistor coupled to the driving circuit, wherein the overdrive voltage drives the power transistor.
3 . The integrated circuit of claim 1 , wherein the internal bootstrap circuit comprises:
a bootstrap diode having a cathode terminal coupled to the first stage; and
a bootstrap capacitor coupled between the cathode terminal and an output pin of the driving circuit.
4 . The integrated circuit of claim 3 , wherein the driving circuit further comprises a third stage having a first enhanced-mode high electron mobility transistor (E-HEMT), a second E-HEMT, and a third E-HEMT, and the first E-HEMT of the third stage has a source/drain terminal and a gate terminal coupled to the external bootstrap circuit.
5 . The integrated circuit of claim 1 , wherein the depletion-mode transistor of the first stage is a depletion-mode high electron mobility transistor (D-HEMT) and the enhanced-mode transistor of the first stage is a first enhanced-mode high electron mobility transistor (E-HEMT), wherein the pair of enhanced-mode transistors of the second stage has second and third E-HEMTs, wherein a gate terminal of the D-HEMT is coupled to a source/drain terminal of the first E-HEMT.
6 . The integrated circuit of claim 5 , wherein the first and second E-HEMTs are in an off-state at a zero gate-source voltage and the D-HEMT is operational when a voltage of zero is applied to the gate terminal thereof and non-operational when a negative voltage is applied to the gate terminal thereof.
7 . The integrated circuit of claim 1 , wherein the driving circuit further comprises a fourth stage having a pair of E-HEMTs.
8 . The integrated circuit of claim 1 , further comprising a boot-strapped inverting buffer circuit configured to reduce an input load of the first stage.
9 . The integrated circuit of claim 1 , wherein the charge pump is coupled between the internal bootstrap circuit and the external bootstrap circuit.
10 . A method comprising:
generating, by a charge pump circuit, a dynamic charge pump voltage configured to drive a first voltage stage and a second voltage stage of an integrated circuit, wherein the first voltage stage has a depletion-mode transistor and an enhanced-mode transistor;
generating, by an internal bootstrap circuit, a boosted voltage based on the dynamic charge pump voltage;
receiving, by the first voltage stage and a third voltage stage of the integrated circuit, a shared voltage input, wherein the third voltage stage is coupled to an external bootstrap circuit, and the external bootstrap circuit includes a diode coupled to the third voltage stage and a capacitor coupled between the diode and a reference voltage pin; and
generating, by the third voltage stage, an overdrive voltage based on the boosted voltage to drive a power transistor.
11 . The method of claim 10 , wherein the overdrive voltage exceeds a minimum voltage threshold of the power transistor.
12 . The method of claim 10 , further comprising:
minimizing a static current of the first voltage stage and the second voltage stage.
13 . A system comprising:
a high-side driver having a plurality of staged high electron mobility transistors (HEMTs), the high-side driver configured to provide an overdrive voltage;
a charge pump circuit coupled between a first portion of the plurality of staged HEMTs and a second portion of the plurality of staged HEMTs and configured to generate a dynamic charge-pump voltage greater than the overdrive voltage, wherein the first portion and the second portion have a shared voltage input, the first portion of the plurality of staged HEMTs has a depletion-mode HEMT (D-HEMT) and an enhanced-mode HEMT (E-HEMT), and the second portion of the plurality of staged HEMTs comprises a pair of E-HEMTs; and
a bootstrap circuit coupled between the first portion of the plurality of staged HEMTs and the charge pump circuit.
14 . The system of claim 13 , wherein the bootstrap circuit is configured to increase the overdrive voltage of the high-side driver.
15 . The system of claim 14 , wherein the bootstrap circuit comprises:
a bootstrap diode having a cathode terminal coupled to the first portion of the plurality of staged HEMTs; and
a bootstrap capacitor coupled between the cathode terminal and an output pin of the high-side driver.
16 . The system of claim 15 , wherein the plurality of staged HEMTs further comprises a third portion having a first enhanced mode HEMT (E-HEMT), a second E-HEMT, and a third E-HEMT, and the first E-HEMT of the third portion having a source/drain terminal and a gate terminal coupled to an external bootstrap circuit.
17 . The system of claim 13 , wherein:
the E-HEMT of the first portion of the plurality of staged HEMTs is a first E-HEMT;
the pair of E-HEMTs in the second portion of the plurality of staged HEMTs comprises second and third E-HEMTs;
a gate terminal of the D-HEMT is coupled to a source/drain terminal of the first E-HEMT; and
a source/drain terminal of the D-HEMT is coupled to the bootstrap circuit.
18 . The system of claim 17 , wherein the first and second E-HEMTs are in an off-state at a zero gate-source voltage and the D-HEMT is operational when a voltage of zero is applied to the gate terminal thereof and non-operational when a negative voltage is applied to the gate terminal thereof.
19 . The system of claim 13 , further comprising an external bootstrap circuit having a diode coupled between the charge pump circuit and the second portion of the plurality of staged HEMTs and a capacitor coupled between the diode and a reference voltage pin.
20 . The system of claim 13 , further comprising a power transistor coupled to the second portion of the plurality of staged HEMTs, wherein the overdrive voltage drives the power transistor.