IP Library › Granted Patent US 12,207,480
Granted Patent B2
US 12,207,480 · App. 17/899,898 · Granted Jan 21, 2025

Variable resistance non-volatile memory with a gate insulator film at a same height as a voltage application electrode

Inventors: Tomoki Chiba (Fujisawa Kanagawa, JP); Daisaburo Takashima (Yokohama Kanagawa, JP); Hidehiro Shiga (Yokohama Kanagawa, JP)
Assignee: Kioxia Corporation
H10B63/34G11C11/1673G11C13/0026G11C13/004H10B61/22H10B63/845H10N70/231H10N70/8413H10N70/8825H10N70/8828H10N70/8833G11C2213/71
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Quick Facts
Patent No.
US 12,207,480
App. No.
17/899,898
Granted
Jan 21, 2025
Kind
B2
Abstract

A variable resistance non-volatile memory includes a semiconductor substrate, a first electrode line extending in a first direction away from the semiconductor substrate, a second electrode line extending in the first direction parallel to the first electrode line, an insulating film between the first and second electrode lines, a variable resistance film formed on the first electrode line, a low electrical resistance layer formed on the variable resistance film and having a lower electrical resistance than the variable resistance film, a semiconductor film in contact with the low electrical resistance layer and the insulating film, and formed on opposite surfaces of the second electrode line, a gate insulator film extending in the first direction and in contact with the semiconductor film, and a voltage application electrode that extends in a second direction that crosses the first direction, and is in contact with the gate insulator film.

Claims (66)

1. A variable resistance non-volatile memory comprising:

a semiconductor substrate;

a first electrode line extending in a first direction away from the semiconductor substrate;

a second electrode line extending in the first direction parallel to the first electrode line;

an insulating film between the first electrode line and the second electrode line;

a first variable resistance film formed on an outer periphery of the first electrode line;

a first low electrical resistance layer formed on an outer periphery of the first variable resistance film and having a lower electrical resistance than the first variable resistance film;

a first semiconductor film in contact with an outer periphery of the first low electrical resistance layer and the insulating film, and formed on opposite surfaces of the second electrode line;

a gate insulator film extending in the first direction and in contact with an outer periphery of the first semiconductor film; and

a first voltage application electrode that extends in a second direction that crosses the first direction, and is in contact with an outer periphery of the gate insulator film at a same height above the semiconductor substrate as the first semiconductor film.

2. The variable resistance non-volatile memory according to claim 1 , further comprising:

a second variable resistance film formed on the outer periphery of the first electrode line;

a second low electrical resistance layer formed on an outer periphery of the second variable resistance film and having a lower electrical resistance than the second variable resistance film;

a second semiconductor film in contact with an outer periphery of the second low electrical resistance layer and the insulating film, and formed on the opposite surfaces of the second electrode line; and

a second voltage application electrode that is stacked above the first voltage application electrode in the first direction, extends in the second direction, and is in contact with the outer periphery of the gate insulator film at a same height above the semiconductor substrate as the second semiconductor film.

3. The variable resistance non-volatile memory according to claim 2 , wherein:

the first and second variable resistance films are made of the same material and are physically separate from each other;

the first and second low electrical resistance layers are made of the same material and are physically separate from each other; and

the first and second semiconductor films are made of the same material and are physically separate from each other.

4. The variable resistance non-volatile memory according to claim 3 , further comprising:

a first barrier film disposed between the first variable resistance film and the first electrode line and between the second variable resistance film and the first electrode line; and

a second barrier film disposed between the first semiconductor film and the second electrode line and between the second semiconductor film and the second electrode line.

5. The variable resistance non-volatile memory according to claim 4 , wherein

the first and second low electrical resistance layers each include at least one material selected from the group consisting of W, Ti, TiN, TaN, and WSi.

6. The variable resistance non-volatile memory according to claim 4 , wherein

the first barrier film and the second barrier film each include at least one material selected from the group consisting of TiN, TaN, TiO X , C, CN, C—W, and C—WN.

7. The variable resistance non-volatile memory according to claim 2 , further comprising:

a barrier film between the first low electrical resistance layer and the first variable resistance film and between the second low electrical resistance layer and the second variable resistance film.

8. The variable resistance non-volatile memory according to claim 7 , wherein

the barrier film includes a heat generation film.

9. The variable resistance non-volatile memory according to claim 8 , wherein

the heat generation film includes germanium, tellurium, or a group III-V compound including indium as an impurity.

10. The variable resistance non-volatile memory according to claim 1 , wherein

the first variable resistance film is formed of a phase change material, a superlattice film material, a magnetic material, or a variable resistance material,

the phase change material includes a chalcogenide-based material,

the superlattice film material includes a stack structure of GeTe and SbTe,

the magnetic material includes a tunnel film interposed between a free layer and a pin layer, and

the first variable resistance material includes at least one material selected from the group consisting of NiO X , WO X , TaO X , TiO X , HfO X , ZnO X , TiON, Ag—GeSe, Cu—GeSe, FeO X , GeO X , and STO.

11. A variable resistance non-volatile memory comprising:

a semiconductor substrate;

a first electrode line extending in a first direction away from the semiconductor substrate;

a second electrode line extending in the first direction parallel to the first electrode line;

an insulating film between the first electrode line and the second electrode line;

a first variable resistance film formed on an outer periphery of the first electrode line;

a first semiconductor film in contact with an outer periphery of the first variable resistance film and the insulating film, and formed on opposite surfaces of the second electrode line;

a gate insulator film extending in the first direction and in contact with an outer periphery of the first semiconductor film; and

a first voltage application electrode that extends in a second direction that crosses the first direction, and is in contact with an outer periphery of the gate insulator film at a same height above the semiconductor substrate as the first semiconductor film, wherein

wherein the second semiconductor film is doped with impurities at a concentration of at about 1×10 21 cm −3 or above.

12. The variable resistance non-volatile memory according to claim 11 , further comprising:

a second variable resistance film formed on the outer periphery of the first electrode line;

a second semiconductor film in contact with an outer periphery of the second variable resistance film and the insulating film, and formed on the opposite surfaces of the second electrode line; and

a second voltage application electrode that is stacked above the first voltage application electrode in the first direction, extends in the second direction, and is in contact with the outer periphery of the gate insulator film at a same height above the semiconductor substrate as the second semiconductor film,

wherein the second semiconductor film is doped with impurities at a concentration of at about 1×10 21 cm −3 or above.

13. The variable resistance non-volatile memory according to claim 12 , wherein

the first and second variable resistance films are made of the same material and are physically separate from each other; and

the first and second semiconductor films are made of the same material and are physically separate from each other.

14. The variable resistance non-volatile memory according to claim 11 , wherein

an impurity concentration of the first semiconductor film is lower in a first portion in contact with the insulating film than in a second portion in contact with the variable resistance film.

15. The variable resistance non-volatile memory according to claim 14 , wherein

an impurity concentration of the first semiconductor film is higher in a third portion in contact with the second electrode line than in the first portion in contact with the insulating film.

16. The variable resistance non-volatile memory according to claim 11 , wherein

the first variable resistance film is formed of a phase change material, a superlattice film material, a magnetic material, or a variable resistance material,

the phase change material includes a chalcogenide-based material,

the superlattice film material includes a stack structure of GeTe and SbTe,

the magnetic material includes a tunnel film interposed between a free layer and a pin layer, and

the variable resistance material includes at least one material selected from the group consisting of NiO X , WO X , TaO X , TiO X , HfO X , ZnO X , TiON, Ag—GeSe, Cu—GeSe, FeO X , GeO X , and STO.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 16, 2023
From: CHIBA, TOMOKI; TAKASHIMA, DAISABURO; SHIGA, HIDEHIRO
To: KIOXIA CORPORATION
Reel/Frame 063008/0001 →
Priority Claims (1)
JP 2022-031640 · Mar 2, 2022 · national
Continuity (1)
Related Publication 20230284460A1 · Sep 7, 2023
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Cited By (1)
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