IP Library › Granted Patent US 11,792,541
Granted Patent B2
US 11,792,541 · App. 17/901,994 · Granted Oct 17, 2023

Solid-state imaging device and method of controlling solid-state imaging device

Inventors: Taiichiro Watanabe (Kanagawa, JP); Tetsuji Yamaguchi (Kanagawa, JP); Yusuke Sato (Kanagawa, JP); Fumihiko Koga (Kanagawa, JP)
Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
H04N25/626H10K39/32
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Quick Facts
Patent No.
US 11,792,541
App. No.
17/901,994
Granted
Oct 17, 2023
Kind
B2
Abstract

A solid-state imaging device according to an embodiment of the disclosure includes a first electrode, a second electrode, a photoelectric conversion layer, and a voltage applier. The first electrode includes a plurality of electrodes independent from each other. The second electrode is disposed opposite to the first electrode. The photoelectric conversion layer is disposed between the first electrode and the second electrode. The voltage applier applies different voltages to at least one of the first electrode or the second electrode during a charge accumulation period and a charge non-accumulation period.

Claims (48)

1. A solid-state imaging device, comprising:

a first electrode including a plurality of electrodes, wherein the plurality of electrodes includes a charge readout electrode and an accumulation electrode;

a second electrode opposite to the first electrode;

a photoelectric conversion layer between the first electrode and the second electrode; and

a voltage applier configured to apply different voltages during a charge accumulation period and a charge non-accumulation period to at least one of the first electrode or the second electrode.

2. The solid-state imaging device according to claim 1 , wherein the first electrode further includes a discharge electrode.

3. The solid-state imaging device according to claim 1 , wherein

the first electrode further includes a first barrier adjustment electrode between the charge readout electrode and the accumulation electrode, and

the first barrier adjustment electrode is configured to adjust a voltage across the charge readout electrode and the accumulation electrode.

4. The solid-state imaging device according to claim 1 , wherein

the first electrode further includes a second barrier adjustment electrode on a side of the charge readout electrode opposite to the accumulation electrode, and

the second barrier adjustment electrode is configured to adjust a voltage across the charge readout electrode and the accumulation electrode.

5. The solid-state imaging device according to claim 1 , wherein a voltage across the charge readout electrode and the accumulation electrode is larger during the charge non-accumulation period than during the charge accumulation period.

6. The solid-state imaging device according to claim 1 , wherein a potential difference between the accumulation electrode and the second electrode is larger during the charge non-accumulation period than during the charge accumulation period.

7. The solid-state imaging device according to claim 2 , wherein the charge readout electrode also serves as the discharge electrode.

8. The solid-state imaging device according to claim 1 , wherein

the accumulation electrode is divided into a plurality of segments, and

each segment of the plurality of segments is configured to receive a different voltage.

9. The solid-state imaging device according to claim 2 , further comprising an insulating layer between the first electrode and the photoelectric conversion layer,

wherein the charge readout electrode and the discharge electrode are electrically coupled with the photoelectric conversion layer via an opening in the insulating layer.

10. The solid-state imaging device according to claim 9 , further comprising a semiconductor layer between the photoelectric conversion layer and the insulating layer,

wherein the charge readout electrode is electrically coupled with the photoelectric conversion layer via the semiconductor layer.

11. The solid-state imaging device according to claim 1 , wherein each of the plurality of electrodes is configured to receive a separate voltage.

12. The solid-state imaging device according to claim 1 , further comprising:

an organic photoelectric transducer; and

an inorganic photoelectric transducer, wherein

the organic photoelectric transducer is on the inorganic photoelectric transducer,

the organic photoelectric transducer includes at least one photoelectric conversion layer, and

the inorganic photoelectric transducer is configured to perform photoelectric conversion in a different wavelength band from the organic photoelectric transducer.

13. The solid-state imaging device according to claim 12 , wherein,

the inorganic photoelectric transducer is in a semiconductor substrate, and

the organic photoelectric transducer is on a first surface side of the semiconductor substrate.

14. The solid-state imaging device according to claim 13 , wherein a multilayer wiring layer is on a second surface side of the semiconductor substrate.

15. A method of controlling a solid-state imaging device, comprising:

applying different voltages to at least one of a first electrode or a second electrode during a charge accumulation period and a charge non-accumulation period, wherein

the first electrode includes a plurality of electrodes,

the plurality of electrodes includes a charge readout electrode and an accumulation electrode,

the second electrode is opposite to the first electrode, and

a photoelectric conversion layer is between the first electrode and the second electrode.

16. The method of controlling the solid-state imaging device according to claim 15 , wherein

the first electrode further includes a first barrier adjustment electrode between the charge readout electrode and the accumulation electrode, and

a voltage is applied to the first barrier adjustment electrode during the charge non-accumulation period to cause a voltage across the charge readout electrode and the accumulation electrode to be larger during the charge non-accumulation period than during the charge accumulation period.

17. The method of controlling the solid-state imaging device according to claim 15 , wherein a reset voltage applied at a shutter timing after the charge accumulation period is larger than the reset voltage applied at a shutter timing before the charge accumulation period.

18. The method of controlling the solid-state imaging device according to claim 15 , wherein

a voltage is applied to the second electrode during the charge non-accumulation period, and

a potential difference between the accumulation electrode and the second electrode is larger during the charge non-accumulation period than during the charge accumulation period.

19. The method of controlling the solid-state imaging device according to claim 15 , wherein charges accumulated on the accumulation electrode are discharged from the charge readout electrode in several batches during the charge non-accumulation period.

20. The method of controlling the solid-state imaging device according to claim 15 , wherein a gate of a reset transistor is always turned on during the charge non-accumulation period.

Priority Claims (1)
JP 2017-167852 · Aug 31, 2017 · national
Continuity (2)
Continuation 16640479
Related Publication 20220417459A1 · Dec 29, 2022
Cited By (1)
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