Power semiconductor device including a shielding region
View Patent ↗A power semiconductor device includes a base semiconductor layer including impurities of a first conductivity type; a body portion provided on the base semiconductor layer and defined by a source trench, the body portion including a gate trench extending inwardly from an upper surface of the body portion; a gate electrode provided in the gate trench; a source electrode provided on the body portion and spaced apart from the gate electrode; and a drain electrode provided below the base semiconductor layer, wherein the body portion includes: a drift layer provided on the base semiconductor layer and including impurities of the first conductivity type; and a pair of shielding regions provided in the drift layer, spaced apart from each other in a horizontal direction, and spaced apart from the base semiconductor layer and the gate trench, the pair of shielding regions including impurities of a second conductivity type different from the first conductivity type.
1 . A power semiconductor device comprising:
a base semiconductor layer comprising impurities of a first conductivity type;
a body portion provided on the base semiconductor layer and defined by a source trench, the body portion comprising a gate trench extending inwardly from an upper surface of the body portion;
a gate electrode provided in the gate trench;
a source electrode provided on the body portion and spaced apart from the gate electrode; and
a drain electrode provided below the base semiconductor layer,
wherein the body portion comprises:
a drift layer provided on the base semiconductor layer and comprising impurities of the first conductivity type; and
a pair of shielding regions provided in the drift layer, spaced apart from each other in a horizontal direction, and spaced apart from the base semiconductor layer and the gate trench, the pair of shielding regions comprising impurities of a second conductivity type different from the first conductivity type,
wherein the drift layer comprises:
a lower drift layer provided on the base semiconductor layer; and
an upper drift layer provided on the lower drift layer,
wherein the pair of shielding regions is between the lower drift layer and the upper drift layer such that the pair of shielding regions overlaps with the lower drift layer in a vertical direction and the upper drift layer overlaps with the pair of shielding regions in the vertical direction, and
wherein a horizontal width of the gate trench is equal to or less than a separation distance between the pair of shielding regions.
2 . The power semiconductor device of claim 1 , wherein an uppermost surface of the lower drift layer and an upper surface of the pair of shielding regions are located at a same vertical level to be coplanar.
3 . The power semiconductor device of claim 1 , wherein a thickness of the lower drift layer is greater than a thickness of the upper drift layer.
4 . The power semiconductor device of claim 1 , wherein the source trench extends from the upper surface of the body portion into the lower drift layer to be lower than the pair of shielding regions.
5 . The power semiconductor device of claim 1 , wherein the body portion further comprises a pillar region covering the drift layer and the pair of shielding regions along a bottom surface and inner side surfaces of the source trench, the pillar region comprising impurities of the second conductivity type.
6 . The power semiconductor device of claim 5 , wherein the body portion further comprises:
a base region provided on the drift layer and doped with impurities of the second conductivity type at a concentration lower than a concentration of the impurities of the second conductivity type of the pair of shielding regions;
a source region disposed on the base region, connected to the source electrode, and doped with impurities of the first conductivity type at a concentration higher than a concentration of the impurities of the first conductivity type of the drift layer; and
a pair of ohmic regions provided at ends of the base region and the source region to be in contact with the pillar region, the pair of ohmic regions being doped with impurities of the second conductivity type at a higher concentration than a concentration of the impurities of the second conductivity type of the base region.
7 . The power semiconductor device of claim 5 , wherein the pillar region comprises:
a bottom pillar region covering the drift layer and extending in the horizontal direction along the bottom surface of the source trench; and
a side pillar region covering the drift layer and the pair of shielding regions and extending in the vertical direction along the inner side surfaces of the source trench, and
wherein a thickness of the bottom pillar region in the vertical direction is greater than a thickness of the side pillar region in the horizontal direction.
8 . The power semiconductor device of claim 1 , wherein the body portion comprises 4H—SiC.
9 . The power semiconductor device of claim 1 , wherein the gate trench and the source trench are non-overlapping in the vertical direction with respect to the pair of shielding regions.
10 . A power semiconductor device comprising:
a base semiconductor layer comprising impurities of a first conductivity type;
a body portion provided on the base semiconductor layer and defined by a source trench, the body portion comprising a gate trench extending inwardly from an upper surface of the body portion;
a gate electrode provided in the gate trench;
a source electrode provided on the body portion and spaced apart from the gate electrode; and
a drain electrode provided below the base semiconductor layer,
wherein the body portion comprises:
a drift layer comprising impurities of the first conductivity type, a lower drift layer provided on the base semiconductor layer, and an upper drift layer provided on the lower drift layer;
a pillar region covering the drift layer along a bottom surface and inner side surfaces of the source trench, the pillar region comprising impurities of a second conductivity type different from the first conductivity type; and
at least one shielding region provided between the lower drift layer and the upper drift layer, the at least one shielding region comprising impurities of the second conductivity type.
11 . The power semiconductor device of claim 10 , wherein the at least one shielding region comprises a pair of shielding regions spaced apart from each other in a horizontal direction and spaced apart from the base semiconductor layer and the gate trench.
12 . The power semiconductor device of claim 10 , wherein a side region of the pillar region forms a superjunction with the drift layer.
13 . The power semiconductor device of claim 10 , wherein a thickness of the lower drift layer is greater than a thickness of the upper drift layer, and
wherein the source trench extends from the upper surface of the body portion to a lower vertical level than a lower surface of the at least one shielding region.
14 . The power semiconductor device of claim 10 , wherein the body portion further comprises:
a base region provided on the drift layer and doped with impurities of the second conductivity type at a concentration lower than a concentration of the impurities of the second conductivity type of the at least one shielding region;
a source region provided on the base region, connected to the source electrode, and doped with impurities of the first conductivity type at a concentration higher than a concentration of the impurities of the first conductivity type of the drift layer; and
a pair of ohmic regions provided at ends of the base region and the source region to be in contact with an upper end of the pillar region, the pair of ohmic regions being doped with impurities of the second conductivity type at a concentration higher than a concentration of the impurities of the second conductivity type of the base region.
15 . The power semiconductor device of claim 10 , wherein the gate trench overlaps the at least one shielding region in a vertical direction and extends to the at least one shielding region.
16 . The power semiconductor device of claim 15 , wherein the upper drift layer is doped with impurities of the first conductivity type at a concentration higher than a concentration of the impurities of the first conductivity type of the lower drift layer.
17 . A power semiconductor device comprising:
a base semiconductor layer comprising impurities of a first conductivity type;
a body portion provided on the base semiconductor layer and defined by a source trench, the body portion comprising 4 H-SiC and a gate trench extending inwardly from an upper surface of the body portion;
a gate electrode provided in the gate trench;
a source electrode spaced apart from the gate electrode and provided on the body portion; and
a drain electrode provided below the base semiconductor layer,
wherein the body portion comprises:
a drift layer comprising impurities of the first conductivity type, a lower drift layer provided on the base semiconductor layer, and an upper drift layer provided on the lower drift layer;
a pair of shielding regions provided between the lower drift layer and the upper drift layer, spaced apart from each other in a horizontal direction, and spaced apart from the base semiconductor layer and the gate trench, the pair of shielding regions comprising impurities of a second conductivity type different from the first conductivity type;
a pillar region covering the lower drift layer, the pair of shielding regions, and the upper drift layer along a bottom surface and inner side surfaces of the source trench, the pillar region comprising impurities of the second conductivity type;
a base region provided on the drift layer and doped with impurities of the second conductivity type at a concentration lower than a concentration of the impurities of the second conductivity type of the pair of shielding regions;
a source region provided on the base region, connected to the source electrode, and doped with impurities of the first conductivity type at a concentration higher than a concentration of the impurities of the first conductivity type of the drift layer; and
a pair of ohmic regions disposed at ends of the base region and the source region to be in contact with an upper end of the pillar region, the pair of ohmic regions being doped with impurities of the second conductivity type at a concentration higher than the concentration of the impurities of the second conductivity type of the base region.
18 . The power semiconductor device of claim 17 , wherein a thickness of the lower drift layer is greater than a thickness of the upper drift layer;
wherein an uppermost surface of the lower drift layer and an upper surface of the pair of shielding regions are at a same vertical level, and
wherein the source trench extends from the upper surface of the body portion to a vertical level lower than a lower surface of the pair of shielding regions.
19 . The power semiconductor device of claim 17 , wherein the pillar region comprises:
a bottom pillar region covering the drift layer and extending in the horizontal direction along the bottom surface of the source trench; and
a side pillar region covering the lower drift layer, the pair of shielding regions, and the drift layer and extending in a vertical direction along the inner side surfaces of the source trench, the side pillar region having a thickness of about 0.3 μm to about 0.8 μm, and the side pillar region extending along the bottom surface and the inner side surfaces of the source trench, and
wherein a thickness of the bottom pillar region in the vertical direction is greater than the thickness of the side pillar region in the horizontal direction.