Semiconductor structure and forming method thereof
Semiconductor structure and forming method thereof are provided. The forming method includes: forming a substrate including a power rail region, the power rail region including a first area and a second area, the power rail region having a first fin and a second fin spanning the second area; forming sidewall spacers on sidewall surfaces of the first fin and the second fin after forming the first fin and the second fin; forming a first patterned layer on the substrate, the first patterned layer having a first opening in the first patterned layer exposing the power rail region; etching the substrate using the first patterned layer as a mask to form power rail openings in the substrate; forming isolation films on inner wall surfaces of the power rail openings; and forming buried power rails in the power rail openings after forming the isolation films.
1 . A semiconductor structure, comprising:
a substrate including a power rail region, the power rail region including a first area, a second area, and a third area arranged along a first direction;
a first fin on the first and second areas and extending lengthwise along the first direction, and a second fin on the second and third areas and extending lengthwise along the first direction, the first and second fins being arranged widthwise along a second direction, and the second direction being perpendicular to the first direction;
a buried power rail having a length spanning the first, second and third areas along the first direction in the power rail region, the buried power rail being formed in the substrate, the buried power rail in the second area being between the first fin and the second fin, and in the second direction widths of the buried power rail in the first area and the third area being greater than a width of the buried power rail in the second area; and
an isolation film formed between the buried power rail and the substrate,
wherein
orthographic projections, to a plane perpendicular to the first direction, of the first fin and a portion of the buried power rail in the third area, overlap with each other; and
orthographic projections, to the plane perpendicular to the first direction, of the second fin and a portion of the buried power rail in the first area, overlap with each other.
2 . The structure according to claim 1 , further comprising a first dielectric layer on a top surface of the substrate, wherein:
a top surface of the first dielectric layer is lower than top surfaces of the first and second fins along a third direction, the buried power rail also extends upward along the third direction into the first dielectric layer, the isolation film is also between sidewalls of the buried power rail and the first dielectric layer, and a top surface of the buried power rail is lower than the top surface of the first dielectric layer along the third direction, the third direction being perpendicular to both the first direction and the second direction.
3 . The structure according to claim 2 , further comprising a second dielectric layer on the top surface of the buried power rail and in the first dielectric layer.
4 . The structure according to claim 1 , further comprising:
a first source-drain opening in the first fin on the first area;
a first source-drain structure in the first source-drain opening; and
a first conductive structure on the first area, the first conductive structure being in contact with a top surface of the first source-drain structure and a top surface of the buried power rail in the first area.
5 . The structure according to claim 1 , further comprising:
a second source-drain opening in the second fin on the third area;
a second source-drain structure in the second source-drain opening; and
a second conductive structure on the third area, the second conductive structure being in contact with a top surface of the second source-drain structure and a top surface of the buried power rail in the third area.
6 . The structure according to claim 3 , wherein a top surface of the second dielectric layer is flush with the top surface of the first dielectric layer along the third direction.
7 . The structure according to claim 2 , further comprising an interlayer dielectric layer on a surface of the first dielectric layer.
8 . The structure according to claim 4 , further comprising an interlayer dielectric layer on the first source-drain structure.
9 . The structure according to claim 5 , further comprising an interlayer dielectric layer on the second source-drain structure.
10 . The structure according to claim 1 , wherein the substrate is made of silicon, silicon carbide, silicon germanium, a multi-component semiconductor material composed of group III-V elements, silicon-on-insulator (SOI), or germanium-on-insulator.
11 . The structure according to claim 1 , wherein the buried power rail is made of rubidium, tungsten, or cobalt.
12 . The structure according to claim 1 , wherein the isolation film is made of silicon oxide, silicon nitride, silicon carbide, silicon oxycarbide, silicon oxynitride, aluminum oxide, aluminum nitride, silicon nitride carbide, or silicon nitride/oxycarbide.
13 . The structure according to claim 1 , wherein the substrate further includes a third fin and a fourth fin on two sides of the power rail region respectively along the second direction.
14 . The structure according to claim 2 , wherein the first dielectric layer is on sidewalls of the first fin and the second fin.
15 . The structure according to claim 2 , wherein the first dielectric layer is made of silicon oxide, silicon nitride, silicon carbide, silicon oxycarbide, silicon oxynitride, aluminum oxide, or aluminum nitride.
16 . The structure according to claim 3 , wherein the second dielectric layer is made of silicon oxide.
17 . The structure according to claim 7 , wherein the interlayer dielectric layer is made of silicon oxide, silicon nitride, silicon carbide, silicon oxycarbide, silicon oxynitride, aluminum oxide, aluminum nitride, silicon nitride carbide, or silicon nitride/oxycarbide.
18 . The structure according to claim 1 , further comprising a first gate, a second gate, a third gate, and a fourth gate, wherein:
the first gate spans along the second direction the first fin of the second area, and the second fin of the second area;
the first gate is separate from the second gate along the second direction;
the fourth gate spans along the second direction the first fin of the second area and the second fin of the second area; and
the fourth gate is separate from the third gate along the second direction.
19 . The structure according to claim 18 , wherein:
the substrate further includes a third fin and a fourth fin on two sides of the power rail region respectively along the second direction;
the first gate is separate from the second gate along the second direction between the second fin and the fourth fin; and
the fourth gate is separate from the third gate along the second direction between the first fin and the third fin.