Display apparatus having dam structures and an insulating material and method of manufacturing the same
A display apparatus includes a substrate, a thin-film transistor, an insulating material stack, and a first dam structure. The substrate includes a display area and a peripheral area located outside the display area. The thin-film transistor layer overlaps the substrate. The insulating material stack overlaps the peripheral area. The first dam structure overlaps the substrate, is located closer to the display area than the insulating material stack, partially covers the insulating material stack, and reaches farther than the insulating material stack with reference to the substrate.
1 . A method for manufacturing a display apparatus, the method comprising:
forming an inorganic insulating layer on a substrate, the substrate comprising a display area and a peripheral area, the inorganic insulating layer comprising a first portion and a second portion, the first portion overlapping the display area, the second portion overlapping the peripheral area and being thicker than the first portion in a direction perpendicular to the substrate;
forming a first dam structure and a second dam structure that overlap the substrate, the first dam structure being located closer to the display area than the second portion, the second portion being located closer to the display area than the second dam structure wherein the first dam structure is at least partly formed on a first side of the thick second portion and the second dam structure being at least partly formed on a second side of the thick second portion; and
removing a part of the substrate overlapped by the second dam structure by emitting a laser beam to at least the second portion.
2 . The method of claim 1 , further comprising forming a first semiconductor layer that overlaps the substrate,
wherein the inorganic insulating layer covers the first semiconductor layer.
3 . The method of claim 1 , further comprising:
forming a first semiconductor layer that overlaps the substrate; and
forming a first gate layer that overlaps the first semiconductor layer,
wherein the inorganic insulating layer covers the first gate layer.
4 . The method of claim 1 , further comprising:
forming a first semiconductor layer that overlaps the substrate;
forming a first gate layer that overlaps the first semiconductor layer; and
forming a conductive layer that overlaps the first gate layer,
wherein the inorganic insulating layer covers the conductive layer.
5 . The method of claim 1 , further comprising:
forming a first semiconductor layer that overlaps the substrate;
forming a first gate layer that overlaps the first semiconductor layer;
forming a conductive layer that overlaps the first gate layer; and
forming a second semiconductor layer that overlaps the conductive layer,
wherein the inorganic insulating layer covers the second semiconductor layer.
6 . The method of claim 1 , further comprising:
forming a first semiconductor layer that overlaps the substrate;
forming a first gate layer that overlaps the first semiconductor layer;
forming a conductive layer that overlaps the first gate layer;
forming a second semiconductor layer that overlaps the conductive layer; and
forming a second gate layer that overlaps the second semiconductor layer,
wherein the inorganic insulating layer covers the second gate layer.
7 . The method of claim 1 , further comprising:
forming a first semiconductor layer that overlaps the substrate;
forming a first gate layer that overlaps the first semiconductor layer;
forming a conductive layer that overlaps the first gate layer;
forming a second semiconductor layer that overlaps the conductive layer; and
forming a second gate layer that overlaps the second semiconductor layer,
wherein the forming of the inorganic insulating layer comprises:
forming a first inorganic insulating layer covering the first semiconductor layer;
forming a second inorganic insulating layer covering the first gate layer;
forming a third inorganic insulating layer covering the conductive layer;
forming a fourth inorganic insulating layer covering the second semiconductor layer; and
forming a fifth inorganic insulating layer covering the second gate layer.