Single crystal semiconductor structure and method of fabricating the same
A single crystal semiconductor structure includes: an amorphous substrate; a single crystal semiconductor layer provided on the amorphous substrate; and a thin orienting film provided between the amorphous substrate and the single crystal semiconductor layer, wherein the thin orienting film is a single crystal thin film, and the thin orienting film has a non-zero thickness that is equal to or less than 10 times a critical thickness h c .
1. A method of fabricating a single crystal semiconductor structure, the method comprising:
forming an orienting thin film on an amorphous substrate;
forming a lower single crystal layer on the orienting thin film;
forming an upper single crystal layer on the lower single crystal layer; and
forming a mask pattern between the lower single crystal layer and the upper single crystal layer,
wherein the orienting thin film has a non-zero thickness that is equal to or less than 10 times a critical thickness h c ,
wherein the critical thickness h c is determined by the following equation:
h
c
=
[
b
4
π
(
1
+
μ
)
ϵ
0
)
]
[
ln
(
h
c
b
)
+
1
]
,
where b is a Burgers vector of dislocation of the orienting thin film, μ is Poisson's ratio of the orienting thin film, and ε 0 is a degree of lattice misfit between the orienting thin film and the lower single crystal layer,
wherein the lower single crystal layer and the upper single crystal layer each comprise a Group III-V compound semiconductor layer,
wherein the mask pattern comprises holes through which the lower single crystal layer is exposed to the upper single crystal layer, and
wherein the upper single crystal layer is formed to fill the holes and cover a top surface of the mask pattern.
2. The method claim 1 , wherein the forming the orienting thin film comprises performing an ion beam assisted deposition (IBAD) process.
3. The method of claim 1 , wherein the forming the lower single crystal layer comprises performing a first epitaxy growth process,
wherein the forming of the upper single crystal layer comprises performing a second epitaxy growth process, and
wherein the first epitaxy growth process is performed at a temperature lower than a temperature at which the second epitaxy growth process is performed.
4. The method of claim 3 , further comprising:
heat treating the lower single crystal layer after the first epitaxy growth process.
5. The method of claim 3 , wherein the first epitaxy growth process is performed at a temperature of 800 degrees (° C.) or lower, and
wherein the second epitaxy growth process is performed at a temperature of 900 degrees (° C.) or higher.
6. The method of claim 1 , wherein the mask pattern is formed through an in-situ process and comprises SiN.
7. The method of claim 1 , wherein the mask pattern is formed through an ex-situ process and comprises SiO 2 or SiN.