IP Library Granted Patent US 12,614,018
Granted Patent B2
US 12,614,018 · App. 17/978,043 · Granted Apr 28, 2026

Methods and apparatus to implement library analytics and guided partitioning to select power-performance-area of semiconductor chip design

Inventors: Sourav Saha (Bangalore, IN); Praveen Ghagare (Bidar, IN); Divya M (Bangalore, IN)
Assignee: Intel Corporation
G06F30/398G06F30/373
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Quick Facts
Patent No.
US 12,614,018
App. No.
17/978,043
Filed
Oct 31, 2022
Granted
Apr 28, 2026
Kind
B2
Examiner
NGO, BRIAN
Art Unit
2851
USPC
716/111
Abstract

Methods, apparatus, systems, and articles of manufacture are disclosed. In one example, the apparatus includes memory, instructions, and processor circuitry to instantiate or execute the machine readable instructions to determine a design block associated with a design exception, parse the design block into a functional netlist of cell families, generate a cell occurrence counts distribution, and group cell families into cell family bins corresponding to fabrication parameters. The processor circuitry further determines inclusion of a first cell family bin does not improve one or more process technology attribute values and causes a user interface to indicate the first cell family bin as a cell family bin candidate for removal from the functional netlist.

Claims (72)

1 . A system, comprising:

at least one memory;

programmable circuitry; and

instructions stored in the at least one memory to cause the programmable circuitry to:

determine a design block associated with a design exception;

parse the design block into a functional netlist of cell families;

generate a cell occurrence counts distribution based on ones of the cell families from the functional netlist;

group the ones of the cell families corresponding to the cell occurrence counts distribution into ones of cell family bins, the ones of the cell family bins corresponding to at least one value of a fabrication parameter;

determine inclusion of a first cell family bin of the ones of the cell family bins in the functional netlist does not improve first one or more process technology attribute values compared to second one or more process technology attribute values, the second one or more process technology attribute values corresponding to when the first cell family bin is removed from the functional netlist; and

cause a user interface to indicate the first cell family bin as a cell family bin candidate for removal from the functional netlist.

2 . The system of claim 1 , wherein the programmable circuitry is to generate the cell occurrence counts distribution based on the ones of the cell families from the functional netlist by:

starting with a first cell family with a highest occurrence count among the ones of the cell families; and

adding second occurrence counts of the ones of cell families in a decreasing occurrence count order until a selection threshold cumulative percentage of total cell families in the functional netlist is satisfied.

3 . The system of claim 1 , wherein the programmable circuitry is to:

determine inclusion of a first cell family of the ones of cell families in the functional netlist does not improve the first one or more process technology attribute values across at least a plurality of fabrication parameters compared to the second one or more process technology attribute values when the first cell family is removed from the functional netlist; and

cause the user interface to indicate the first cell family in the user interface as a cell family candidate for removal from the functional netlist.

4 . The system of claim 1 , wherein at least one of the ones of cell family bins includes cell families with approximately adjacent fabrication parameter values.

5 . The system of claim 4 , wherein the cell occurrence counts distribution of the ones of cell families includes a substantially normal distribution.

6 . The system of claim 1 , wherein the programmable circuitry is to:

concatenate a plurality of the ones of the cell family bins, including an anchor cell family bin with one or more cells of a first fabrication parameter value and at least one adjacent cell family bin with zero cells of the first fabrication parameter value.

7 . The system of claim 1 , wherein the design block is a first design block, the at least one of the one or more process technology attribute values is an average process technology attribute value calculated over a plurality of design blocks, the plurality of design blocks including the first design block.

8 . The system of claim 1 , wherein the fabrication parameter includes one of drive strength or threshold voltage.

9 . The system of claim 1 , wherein the programmable circuitry is to:

initiate a removal matrix for the fabrication parameter, a first dimension of the removal matrix representing the ones of the cell families, a second dimension of the removal matrix representing the ones of the cell family bins; and

cause the user interface to indicate potential removal of a row or a column in the removal matrix, the row or the column representing a removal candidate cell family of the ones of the cell families or representing a removal candidate cell family bin of the ones of the cell family bins.

10 . The system of claim 9 , wherein the fabrication parameter is a first fabrication parameter, the removal matrix to include a third dimension representing ones of fabrication parameters, the ones of the fabrication parameters including the first fabrication parameter.

11 . A non-transitory machine readable storage medium comprising instructions that cause processor circuitry to at least:

determine a design block associated with a design exception;

parse the design block into a functional netlist of cell families;

generate a cell occurrence counts distribution based on ones of the cell families from the functional netlist;

group the ones of the cell families corresponding to the cell occurrence counts distribution into ones of cell family bins, the ones of the cell family bins corresponding to at least one value of a fabrication parameter;

determine inclusion of a first cell family bin of the ones of the cell family bins in the functional netlist does not improve first one or more process technology attribute values compared to second one or more process technology attribute values, the second one or more process technology attribute values corresponding to when the first cell family bin is removed from the functional netlist; and

cause a user interface to indicate the first cell family bin as a cell family bin candidate for removal from the functional netlist.

12 . The non-transitory machine readable storage medium of claim 11 , wherein the instructions cause the processor circuitry to generate the cell occurrence counts distribution based on the ones of the cell families from the functional netlist by causing the processor ciruitry to:

start with a first cell family with a highest occurrence count among the ones of the cell families; and

add second occurrence counts of the ones of cell families in a decreasing occurrence count order until a selection threshold cumulative percentage of total cell families in the functional netlist is satisfied.

13 . The non-transitory machine readable storage medium of claim 11 , wherein the instructions cause the processor circuitry to at least:

determine inclusion of a first cell family of the ones of cell families in the functional netlist does not improve the first one or more process technology attribute values across at least a plurality of fabrication parameters compared to the second one or more process technology attribute values when the first cell family is removed from the functional netlist; and

cause the user interface to indicate the first cell family in the user interface as a cell family candidate for removal from the functional netlist.

14 . The non-transitory machine readable storage medium of claim 11 , wherein at least one of the ones of cell family bins includes cell families with approximately adjacent fabrication parameter values.

15 . The non-transitory machine readable storage medium of claim 11 , wherein the cell occurrence counts distribution of the ones of cell families includes a substantially normal distribution.

16 . The non-transitory machine readable storage medium of claim 11 , wherein the instructions cause the processor circuitry to at least:

concatenate a plurality of the ones of the cell family bins, including an anchor cell family bin with one or more cells of a first fabrication parameter value and at least one adjacent cell family bin with zero cells of the first fabrication parameter value.

17 . The non-transitory machine readable storage medium of claim 11 , wherein the design block is a first design block, the at least one of the one or more process technology attribute values is an average process technology attribute value calculated over a plurality of design blocks, the plurality of design blocks including the first design block.

18 . The non-transitory machine readable storage medium of claim 11 , wherein the fabrication parameter includes one of drive strength or threshold voltage.

19 . The non-transitory machine readable storage medium of claim 11 , wherein the instructions cause the processor circuitry to at least:

initiate a removal matrix for the fabrication parameter, a first dimension of the removal matrix representing the ones of the cell families, a second dimension of the removal matrix representing the ones of the cell family bins; and

cause the user interface to indicate potential removal of a row or a column in the removal matrix, the row or the column representing a removal candidate cell family of the ones of the cell families or representing a removal candidate cell family bin of the ones of the cell family bins.

20 . The non-transitory machine readable storage medium of claim 19 , wherein the fabrication parameter is a first fabrication parameter, the removal matrix to include a third dimension representing ones of fabrication parameters, the ones of the fabrication parameters including the first fabrication parameter.

21 . A method comprising:

determining a design block associated with a design exception;

parsing the design block into a functional netlist of cell families;

generating a cell occurrence counts distribution based on ones of the cell families from the functional netlist;

grouping the ones of the cell families corresponding to the cell occurrence counts distribution into ones of cell family bins, the ones of the cell family bins corresponding to at least one value of a fabrication parameter;

determining inclusion of a first cell family bin of the ones of the cell family bins in the functional netlist does not improve first one or more process technology attribute values compared to second one or more process technology attribute values, the second one or more process technology attribute values corresponding to when the first cell family bin is removed from the functional netlist; and

causing a user interface to indicate the first cell family bin as a cell family bin candidate for removal from the functional netlist.

22 . The method of claim 21 , wherein the generating of the cell occurrence counts distribution based on the ones of the cell families from the functional netlist includes:

starting with a first cell family with a highest occurrence count among the ones of the cell families; and

adding second occurrence counts of the ones of cell families in a decreasing occurrence count order until a selection threshold cumulative percentage of total cell families in the functional netlist is satisfied.

23 . The method of claim 21 , including:

determining inclusion of a first cell family of the ones of cell families in the functional netlist does not improve the first one or more process technology attribute values across at least a plurality of fabrication parameters compared to the second one or more process technology attribute values when the first cell family is removed from the functional netlist; and

causing the user interface to indicate the first cell family in the user interface as a cell family candidate for removal from the functional netlist.

24 . The method of claim 21 , wherein at least one of the ones of cell family bins includes cell families with approximately adjacent fabrication parameter values.

25 . The method of claim 21 , wherein the cell occurrence counts distribution of the ones of cell families includes a substantially normal distribution.

26 . The method of claim 21 , including:

concatenating a plurality of the ones of the cell family bins, including an anchor cell family bin with one or more cells of a first fabrication parameter value and at least one adjacent cell family bin with zero cells of the first fabrication parameter value.

27 . The method of claim 21 , wherein the design block is a first design block, the at least one of the one or more process technology attribute values is an average process technology attribute value calculated over a plurality of design blocks, the plurality of design blocks including the first design block.

28 . The method of claim 21 , wherein the fabrication parameter includes one of drive strength or threshold voltage.

29 . The method of claim 21 , including:

initiating a removal matrix for the fabrication parameter, a first dimension of the removal matrix representing the ones of the cell families, a second dimension of the removal matrix representing the ones of the cell family bins; and

causing the user interface to indicate potential removal of a row or a column in the removal matrix, the row or the column representing a removal candidate cell family of the ones of the cell families or representing a removal candidate cell family bin of the ones of the cell family bins.

30 . The method of claim 29 , wherein the fabrication parameter is a first fabrication parameter, the removal matrix to include a third dimension representing ones of fabrication parameters, the ones of the fabrication parameters including the first fabrication parameter.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 18, 2026
From: INTEL CORPORATION
To: INTEL FOUNDRY IP LLC
Reel/Frame 076064/0951 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 16, 2022
From: SAHA, SOURAV; GHAGARE, PRAVEEN; M, DIVYA
To: INTEL CORPORATION
Reel/Frame 061789/0036 →
Continuity (1)
Related Publication 20240143892A1 · May 2, 2024
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