IP Library Granted Patent US 12,159,943
Granted Patent B2
US 12,159,943 · App. 17/981,178 · Granted Dec 3, 2024

GaN vertical-channel junction field-effect transistors with regrown p-GaN by metal organic chemical vapor deposition (MOCVD)

Inventors: Yuji Zhao (Chandler, AZ); Chen Yang (Tempe, AZ); Houqiang Fu (Tempe, AZ); Xuanqi Huang (Tempe, AZ); Kai Fu (Tempe, AZ)
Assignee: Arizona Board of Regents on behalf of Arizona State University
H01L29/8083H01L21/3065H01L21/3081H01L29/1058H01L29/2003H01L29/66446H01L29/66909
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Quick Facts
Patent No.
US 12,159,943
App. No.
17/981,178
Granted
Dec 3, 2024
Kind
B2
Abstract

Fabricating a vertical-channel junction field-effect transistor includes forming an unintentionally doped GaN layer on a bulk GaN layer by metalorganic chemical vapor deposition, forming a Cr/SiO 2 hard mask on the unintentionally doped GaN layer, patterning a fin by electron beam lithography, defining the Cr and SiO 2 hard masks by reactive ion etching, improving a regrowth surface with inductively coupled plasma etching, removing hard mask residuals, regrowing a p-GaN layer, selectively etching the p-GaN layer, forming gate electrodes by electron beam evaporation, and forming source and drain electrodes by electron beam evaporation. The resulting vertical-channel junction field-effect transistor includes a doped GaN layer, an unintentionally doped GaN layer on the doped GaN layer, and a p-GaN regrowth layer on the unintentionally doped GaN layer. Portions of the p-GaN regrowth layer are separated by a vertical channel of the unintentionally doped GaN layer.

Claims (24)

1. A vertical-channel junction field-effect transistor comprising:

a doped GaN layer;

an unintentionally doped GaN layer on the doped GaN layer;

a p-GaN regrowth layer on the unintentionally doped GaN layer, wherein portions of the p-GaN regrowth layer are separated by a vertical channel of the unintentionally doped GaN layer;

gate electrodes in direct contact with the p-GaN regrowth layer; and

a source electrode in direct contact with and overlapping with the p-GaN regrowth layer and the unintentionally doped GaN layer.

2. The vertical-channel junction field-effect transistor of claim 1 , wherein the gate electrodes are separated by the vertical channel of the unintentionally doped GaN layer.

3. The vertical-channel junction field-effect transistor of claim 2 , further comprising a source electrode on the vertical channel of the unintentionally doped GaN layer.

4. The vertical-channel junction field-effect transistor of claim 3 , further comprising a drain electrode on the doped GaN layer.

5. The vertical-channel junction field-effect transistor of claim 4 , wherein a regrowth interface is defined between the p-GaN regrowth layer and the unintentionally doped GaN layer.

6. The vertical-channel junction field-effect transistor of claim 5 , wherein the vertical channel of the unintentionally doped GaN layer forms a vertical p-n junction at the regrowth interface between a gate electrode and a drain electrode.

7. The vertical-channel junction field-effect transistor of claim 6 , further comprising a lateral p-n junction at the regrowth interface perpendicular to the vertical p-n junction, wherein the lateral p-n junction is between the gate electrode and a source electrode.

8. The vertical-channel junction field-effect transistor of claim 1 , wherein the vertical channel is rectangular in shape.

9. The vertical-channel junction field-effect transistor of claim 1 , wherein the vertical channel defines 90° angles with respect to the p-GaN regrowth layer.

10. A vertical-channel junction field-effect transistor comprising:

a doped GaN layer;

an unintentionally doped GaN layer on the doped GaN layer;

a p-GaN regrowth layer on the unintentionally doped GaN layer, wherein portions of the p-GaN regrowth layer are separated by a vertical channel of the unintentionally doped GaN layer; and

a source electrode in direct contact with and overlapping with the unintentionally doped GaN layer and the p-GaN regrowth layer.

11. The vertical-channel junction field-effect transistor of claim 10 , wherein a regrowth interface is defined between the p-GaN regrowth layer and the unintentionally doped GaN layer.

12. The vertical-channel junction field-effect transistor of claim 10 , wherein the vertical channel of the unintentionally doped GaN layer forms a vertical p-n junction at the regrowth interface between a gate electrode and a drain electrode.

13. The vertical-channel junction field-effect transistor of claim 10 , further comprising a lateral p-n junction at the regrowth interface perpendicular to the vertical p-n junction, wherein the lateral p-n junction is between the gate electrode and the source electrode.

14. The vertical-channel junction field-effect transistor of claim 10 , wherein the vertical channel is rectangular in shape.

15. The vertical-channel junction field-effect transistor of claim 10 , wherein the vertical channel defines 90° angles with respect to the p-GaN regrowth layer.

Assignments (2)
CONFIRMATORY LICENSE Recorded Jan 21, 2025
From: ARIZONA STATE UNIVERSITY-TEMPE CAMPUS
To: US DEPARTMENT OF ENERGY
Reel/Frame 069958/0580 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 7, 2022
From: ZHAO, YUJI; YANG, CHEN; FU, HOUQIANG; HUANG, XUANQI; FU, KAI
To: ARIZONA BOARD OF REGENTS ON BEHALF OF ARIZONA STATE UNIVERSITY
Reel/Frame 061673/0009 →
Continuity (3)
Division 17372810 · Jul 12, 2021
Provisional Application 63050505 · Jul 10, 2020
Related Publication 20230106300A1 · Apr 6, 2023