Radio frequency power amplifier implementing an off mode output impedance control and a process of implementing the same

1 . An RF power amplifier circuit comprising:

an input port;

an RF output port;

an RF amplifier device; and

an off mode output impedance control being operable when the RF amplifier device is in an off mode.

2 . The RF power amplifier circuit according to claim 1

wherein the RF power amplifier circuit is configured to be implemented in a system where the RF power amplifier circuit is configured to operate in an on mode and also configured in an off mode; and

wherein the off mode output impedance control is configured and/or operable to provide an output impedance when the RF amplifier device is in an off mode.

3 . The RF power amplifier circuit according to claim 1

wherein the off mode output impedance control is configured to address off mode S 22 parameters when the RF amplifier device is in an off mode;

wherein the off mode output impedance control is configured to not be active when the RF power amplifier circuit is active; and

wherein the off mode output impedance control is configured to be active when the RF power amplifier circuit is not active.

4 . The RF power amplifier circuit according to claim 1

wherein the RF power amplifier circuit is configured with the off mode output impedance control without a circulator; and

wherein the off mode output impedance control is connected to ground.

5 . The RF power amplifier circuit according to claim 1 wherein the off mode output impedance control is configured to control an S 22 parameter when the RF amplifier device is in an off mode to be between 40 ohms and 60 ohms.

6 . The RF power amplifier circuit according to claim 1 wherein the off mode output impedance control comprises:

a mainline connected to the RF output port and an output terminal of the RF amplifier device;

an impedance circuit connected to the mainline; and

at least one switch circuit connected to the mainline and the impedance circuit.

7 . The RF power amplifier circuit according to claim 6

wherein the at least one switch circuit is configured to be active when the RF power amplifier circuit is not active; and

wherein the at least one switch circuit is configured to be not active when the RF power amplifier circuit is active.

8 . The RF power amplifier circuit according to claim 6 wherein the at least one switch circuit comprises a control input.

9 . The RF power amplifier circuit according to claim 8

wherein the control input is configured to control the at least one switch circuit to not be active when the RF power amplifier circuit is active; and

wherein the control input is configured to control the at least one switch circuit to be active when the RF power amplifier circuit is not active.

10 . The RF power amplifier circuit according to claim 8 wherein the control input is generated by a controller associated with the RF power amplifier circuit.

11 . The RF power amplifier circuit according to claim 6 wherein the off mode output impedance control is configured to implement an impedance correction.

12 . The RF power amplifier circuit according to claim 6 wherein the at least one switch circuit is implemented by a plurality of switching devices in series.

13 . The RF power amplifier circuit according to claim 6 wherein the at least one switch circuit is implemented by at least one FET switch, at least one CMOS switch, at least one GaAs FET switch, and/or at least one GaN FET switch.

14 . The RF power amplifier circuit according to claim 6 wherein the off mode output impedance control is configured to provide correction of impedance for the RF power amplifier circuit by closing the at least one switch circuit and providing an impedance correction provided by the impedance circuit.

15 . The RF power amplifier circuit according to claim 1 wherein the off mode output impedance control further comprises a rotation circuit.

16 . The RF power amplifier circuit according to claim 6 wherein the off mode output impedance control is configured to implement two or more separate implementations of the at least one switch circuit and two or more separate implementations of the impedance circuit.

17 . The RF power amplifier circuit according to claim 6 wherein the impedance circuit comprises one of the following: one or more capacitors, one or more capacitors in parallel with one or more resistors, one or more inductors, and/or one or more inductors in parallel with one or more resistors.

18 . The RF power amplifier circuit according to claim 6 wherein the off mode output impedance control is configured to receive a control input from a controller.

19 . The RF power amplifier circuit according to claim 18 wherein the off mode output impedance control further comprises a gate driver configured to be responsive to the controller.

20 . The RF power amplifier circuit according to claim 18 wherein the off mode output impedance control further comprises a level down circuit configured to be responsive to the controller.

21 . The RF power amplifier circuit according to claim 20 wherein the level down circuit is configured to limit generation of spurious signals in a transmit chain of the RF power amplifier circuit.

22 . The RF power amplifier circuit according to claim 20 wherein the level down circuit is configured to control an ON/OFF of the at least one switch circuit.

23 . The RF power amplifier circuit according to claim 20

wherein the RF power amplifier circuit is configured to generate a single voltage; and

wherein the level down circuit is configured to be implemented using the single voltage.

24 . The RF power amplifier circuit according to claim 1 further comprising:

an output impedance matching network connected to the off mode output impedance control;

an input impedance matching network; and

a reference potential port,

wherein the off mode output impedance control is configured to not be active when the RF power amplifier circuit is active; and

wherein the off mode output impedance control is configured to be active when the RF power amplifier circuit is not active.

25 . A process of implementing an RF power amplifier circuit comprising:

providing an input port;

providing an RF output port;

providing an RF amplifier device; and

operating an off mode output impedance control when the RF amplifier device is in an off mode.