IP Library Granted Patent US 12,640,351
Granted Patent B2
US 12,640,351 · App. 18/062,249 · Granted May 26, 2026

Wafer placement table

Inventors: Mikiya Tadaki (Chita-Gun, JP); Kazuhiro Nobori (Handa-City, JP); Takuya Yokono (Komaki-City, JP); Keita Yamana (Nagoya-City, JP); Reon Takanoya (Handa-City, JP); Atsuki Iriyama (Iwakura-City, JP)
Assignee: NGK INSULATORS, LTD.
H01J37/32724H05B3/03H05B3/283H10P72/722
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Quick Facts
Patent No.
US 12,640,351
App. No.
18/062,249
Granted
May 26, 2026
Kind
B2
Abstract

A wafer placement table includes a conductor unit. In the wafer placement table, a sub-RF electrode (first conductive layer) and a jumper layer (second conductive layer) are embedded at different levels in a ceramic substrate having a wafer placement surface, and the conductor unit establishes electrical continuity between the sub-RF electrode and the jumper layer. The conductor unit is a transversely placed coil or a transversely placed perforated cylindrical body.

Claims (21)

1 . A wafer placement table, comprising:

a ceramic substrate having a wafer placement surface;

a first conductive layer and a second conductive layer that are embedded at different levels in the ceramic substrate; and

a conductor unit that establishes electrical continuity between the first conductive layer and the second conductive layer, wherein

the conductor unit is a transversely placed coil or a transversely placed perforated cylindrical hollow body;

wherein a material of the ceramic substrate is contained in an inner space of the conductor unit; and

wherein an inner space of the conductor unit is filled with material of the ceramic substrate.

2 . The wafer placement table according to claim 1 , wherein

a sectional shape of the conductor unit is a circle or an oval.

3 . The wafer placement table according to claim 1 , wherein

the conductor unit is the coil, wherein

at least one of the first conductive layer or the second conductive layer has a hole that penetrates therethrough in a thickness direction, and wherein

the coil is inserted through the hole so as to allow an inner surface of the hole and a side surface of the coil to be in contact with each other.

4 . The wafer placement table according to claim 1 , wherein

the second conductive layer is a linear conductive layer or a rectangular conductive layer that intersects the first conductive layer in plan view, and wherein

an axis of the conductor unit straightly extends in a direction in which the second conductive layer extends.

5 . The wafer placement table according to claim 1 , wherein

the second conductive layer is an annular conductive layer or a sector-shaped conductive layer that overlaps the first conductive layer in plan view, and wherein

an axis of the conductor unit extends along an arc that is concentric with the second conductive layer.

6 . The wafer placement table according to claim 5 , wherein

the wafer placement table has a plurality of conductor units that are provided at regular intervals in a circumferential direction of the ceramic substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 6, 2022
From: TADAKI, MIKIYA; NOBORI, KAZUHIRO; YOKONO, TAKUYA; YAMANA, KEITA; TAKANOYA, REON; IRIYAMA, ATSUKI
To: NGK INSULATORS, LTD.
Reel/Frame 061995/0582 →
Priority Claims (1)
JP 2021-201834 · Dec 13, 2021 · national
Continuity (1)
Related Publication 20230187187A1 · Jun 15, 2023
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