IP Library Granted Patent US 11,398,401
Granted Patent B2
US 11,398,401 · App. 16/799,069 · Granted Jul 26, 2022

Wafer mounting table and method of manufacturing the same

Inventors: Yuji Akatsuka (Handa, JP); Masaki Ishikawa (Handa, JP); Kazuhiro Nobori (Handa, JP); Akiyoshi Hattori (Nagoya, JP); Keiichi Nakamura (Handa, JP)
Assignee: NGK Insulators, Ltd.
H01L21/68757C04B35/515H01J37/32715H01L21/6833H01L21/68785
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Quick Facts
Patent No.
US 11,398,401
App. No.
16/799,069
Granted
Jul 26, 2022
Kind
B2
Abstract

A wafer mounting table includes a first electrode and a second electrode buried inside of a ceramic substrate having a wafer mounting surface so as to be parallel to the wafer mounting surface with the first electrode closer to the wafer mounting surface than the second electrode. The wafer mounting table includes a conductive section that electrically conducts the first electrode and the second electrode. The conductive section is such that a plurality of circular members comprised of plate-shaped metal meshes parallel to the wafer mounting surface are stacked between the first electrode and the second electrode.

Claims (18)

1. A wafer mounting table comprising a first electrode and a second electrode buried inside of a ceramic substrate having a wafer mounting surface so as to be parallel to the wafer mounting surface; and a conductive section that electrically connects the first electrode and the second electrode, which have a vertical distance therebetween, with the first electrode closer to the wafer mounting surface than the second electrode,

wherein the conductive section comprises a plurality of circular members, which are formed of a metal mesh, such that the circular members extend horizontally and are vertically stacked on one another, with each circular member being in electrical contact with an immediately adjacent circular member such that the plurality of circular members form a substantially cylindrical body that has a continuous vertical conductive path having a length between the first electrode and the second electrode, and the length of the continuous vertical conductive path of the conductive section is substantially equal to the vertical distance between the first electrode and the second electrode.

2. The wafer mounting table according to claim 1 ,

Wherein a material of the ceramic substrate is included in a mesh space of the circular members.

3. The wafer mounting table according to claim 1 ,

wherein the first electrode and the second electrode are used as electrostatic electrodes, used as RF electrodes, or used as both an electrostatic electrode and an RF electrode.

4. The wafer mounting table according to claim 1 ,

wherein the first electrode is a disc electrode, and the second electrode is a disc electrode or a ring-shaped electrode which is larger than the first electrode in diameter, and concentric to the first electrode.

5. The wafer mounting table according to claim 1 ,

wherein the ceramic substrate has a ring-shaped step surface which is outside of and lower than the wafer mounting surface,

the first electrode is provided to be opposed to the wafer mounting surface, and

the second electrode is provided to be opposed to the ring-shaped step surface.

6. A method of manufacturing the wafer mounting table of claim 1 , the method comprising:

(a) a step of digging a hole for placing a conductive section from one of surfaces of a ceramic pressure molded body in which a first electrode or its precursor is buried up to the first electrode or the precursor;

(b) a step of stacking and inserting a plurality of plate-shaped metal mesh members in the hole to be parallel to the first electrode or the precursor so that an uppermost one of the metal mesh members reaches an opening of the hole;

(c) a step of providing a second electrode or its precursor in the one of the surfaces of the ceramic pressure molded body to be parallel to the first electrode and in contact with the uppermost one of the metal mesh members;

(d) a step of obtaining a laminated body by spreading ceramic powder on the one of the surfaces of the ceramic pressure molded body to cover the second electrode or the precursor, and performing pressure molding on the ceramic powder; and

(e) a step of performing hot press calcination on the laminated body.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 31, 2020
From: AKATSUKA, YUJI; ISHIKAWA, MASAKI; NOBORI, KAZUHIRO; HATTORI, AKIYOSHI; NAKAMURA, KEIICHI
To: NGK INSULATORS, LTD.
Reel/Frame 052269/0710 →
Continuity (3)
Continuation PCTJP2018039066 · Oct 19, 2018
Provisional Application 62576240 · Oct 24, 2017
Related Publication 20200219755A1 · Jul 9, 2020