IP Library › Granted Patent US 12,210,053
Granted Patent B2
US 12,210,053 · App. 18/084,561 · Granted Jan 28, 2025

Semiconductor device

Inventor: Dyi-Chung Hu (Hsinchu, TW)
G01R31/26
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Quick Facts
Patent No.
US 12,210,053
App. No.
18/084,561
Granted
Jan 28, 2025
Kind
B2
Abstract

A semiconductor device for testing a device under test includes a circuit board, a plurality of probes disposed below the circuit board and facing the device under test, an integrated substrate disposed between the circuit board and the plurality of probes, and signal-transmitting module disposed on the circuit board and next to the integrated substrate. The plurality of probes is electrically coupled to the circuit board through the integrated substrate, and the signal-transmitting module transmits a test signal to the plurality of probes through the integrated substrate and the circuit board to perform a test to the device under test. Another semiconductor device including the integrated substrate and a manufacturing method thereof are provided.

Claims (24)

1. A semiconductor device for testing a device under test, comprising:

a circuit board;

a plurality of probes disposed below the circuit board and facing the device under test;

an integrated substrate disposed between the circuit board and the plurality of probes, the plurality of probes being electrically coupled to the circuit board through the integrated substrate; and

a signal-transmitting module disposed on the circuit board and next to the integrated substrate, wherein the signal-transmitting module transmits a test signal to the plurality of probes through the integrated substrate and the circuit board to perform a test to the device under test,

wherein the integrated substrate comprises:

a first redistribution layer comprising a coarse-pitched circuit layer; and

a second redistribution layer disposed on a side of the first redistribution layer close to the plurality of probes and comprising a fine-pitched circuit layer, wherein the fine-pitched circuit layer is electrically connected to the coarse-pitched circuit layer, wherein a dimension of the coarse-pitched circuit layer is greater than that of the fine-pitched circuit layer.

2. The semiconductor device according to claim 1 , wherein the signal-transmitting module comprises an optical-electrical converter and an optical fiber connected to the optical-electrical converter.

3. The semiconductor device according to claim 1 , wherein the signal-transmitting module comprises a radio frequency component.

4. The semiconductor device according to claim 1 , further comprising:

a power supply component disposed on and electrically connected to the circuit board, wherein the power supply component and the signal-transmitting module are at two opposite sides of the circuit board.

5. The semiconductor device according to claim 1 , wherein the plurality of probes is in contact with the second redistribution layer.

6. The semiconductor device according to claim 1 , wherein the integrated substrate further comprises:

a plurality of third redistribution segments respectively embedded in the second redistribution layer, each of the third redistribution segments comprises an ultra-fine-pitched circuit layer, wherein the ultra-fine-pitched circuit layer is electrically connected to the fine-pitched circuit layer, and the dimension of the fine-pitched circuit layer is greater than a dimension of the ultra-fine-pitched circuit layer.

7. The semiconductor device according to claim 6 , wherein a portion of the plurality of probes is electrically connected to portions of the ultra-fine-pitched circuit layer.

8. The semiconductor device according to claim 1 , further comprising:

a holder body disposed below the circuit board, wherein the plurality of probes penetrates through the holder body.

9. The semiconductor device according to claim 1 , wherein the plurality of probes is integrated with the integrated substrate.

10. The semiconductor device according to claim 1 , wherein the device under test is a semiconductor wafer or a package structure.

11. The semiconductor device according to claim 10 , wherein the package structure comprises a plurality of chips mounted on a substrate, and the plurality of chips comprises:

at least one group of chips comprising at least one processor chip, a plurality of memory chips and at least one optical-electrical chip; and

at least one networking chip connected to the at least one optical-electrical chip in each the at least one group of chips.

12. The semiconductor device according to claim 1 , wherein the integrated substrate is replaceable.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 6, 2026
From: HU, DYI-CHUNG
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
Reel/Frame 075543/0265 →
Continuity (3)
Continuation In Part 17197044 · Mar 10, 2021
Provisional Application 63002276 · Mar 30, 2020
Related Publication 20230117207A1 · Apr 20, 2023
References Cited (3)
US 10937736B2 · Yu · 2021 [cited by examiner]
US 20190120877A1 · Wei · 2019 [cited by examiner]
US 20210096173A1 · Chen · 2021 [cited by examiner]