Semiconductor device including barrier dielectric layer including ferroelectric material

1 . A semiconductor device comprising:

a first electrode and a second electrode that are spaced apart from each other;

a capacitor dielectric structure disposed between the first electrode and the second electrode, and the capacitor dielectric structure including a ferroelectric layer and a dielectric layer; and

a barrier dielectric layer disposed between one of the first and second electrodes and the capacitor dielectric structure, and the barrier dielectric layer including a ferroelectric material,

wherein an absolute value of a capacitance of the barrier dielectric layer is greater than an absolute value of a capacitance of the capacitor dielectric structure, and

a thickness of the barrier dielectric layer is less than a thickness of the capacitor dielectric structure.

2 . The semiconductor device of claim 1 , wherein the barrier dielectric layer contacts the capacitor dielectric structure.

3 . The semiconductor device of claim 1 , wherein the ferroelectric layer and the dielectric layer are electrically connected in series between the first electrode and second electrode.

4 . The semiconductor device of claim 1 , wherein an absolute value of a capacitance of the ferroelectric layer is greater than an absolute value of a capacitance of the dielectric layer.

5 . The semiconductor device of claim 1 ,

wherein the capacitor dielectric structure and the barrier dielectric layer are electrically connected in series to each other to form a dielectric structure, and

wherein a capacitance of the dielectric structure is substantially the same as the capacitance of the capacitor dielectric structure.

6 . The semiconductor device of claim 1 ,

wherein the ferroelectric layer contacts one surface of the dielectric layer, and

wherein the barrier dielectric layer contacts the other surface of the dielectric layer.

7 . The semiconductor device of claim 1 ,

wherein the dielectric layer contacts one surface of the ferroelectric layer, and

wherein the barrier dielectric layer contacts the other surface of the ferroelectric layer.

8 . The semiconductor device of claim 1 ,

wherein the absolute value of the capacitance of the barrier dielectric layer is greater than an absolute value of a capacitance of the ferroelectric layer.

9 . The semiconductor device of claim 1 , wherein the barrier dielectric layer has a thickness of 1 nm to 5 nm.

10 . The semiconductor device of claim 1 , wherein the barrier dielectric layer includes hafnium zirconium oxide.

11 . The semiconductor device of claim 1 , further comprising a dopant doped in the barrier dielectric layer,

wherein the dopant includes at least one selected from the group consisting of carbon (C), silicon (Si), magnesium (Mg), aluminum (Al), yttrium (Y), nitrogen (N), germanium (Ge), tin (Sn), strontium (Sr), lead (Pb), calcium (Ca), barium (Ba), titanium (Ti), gadolinium (Gd), and lanthanum (La).

12 . The semiconductor device of claim 1 , wherein the ferroelectric layer includes hafnium zirconium oxide.

13 . The semiconductor device of claim 1 , further comprising a dopant doped in the ferroelectric layer,

wherein the dopant includes at least one selected from the group consisting of carbon (C), silicon (Si), magnesium (Mg), aluminum (Al), yttrium (Y), nitrogen (N), germanium (Ge), tin (Sn), strontium (Sr), lead (Pb), calcium (Ca), barium (Ba), titanium (Ti), gadolinium (Gd), and lanthanum (La).

14 . The semiconductor device of claim 1 , wherein the dielectric layer includes at least one of aluminum oxide, yttrium oxide, hafnium oxide, zirconium oxide, and hafnium zirconium oxide.

15 . The semiconductor device of claim 1 ,

wherein the ferroelectric layer and the dielectric layer include substantially the same material,

wherein the ferroelectric layer has a crystal structure of an orthorhombic crystal system, and

wherein the dielectric layer has a crystal structure of a monoclinic crystal system or a tetragonal crystal system.

16 . The semiconductor device of claim 1 ,

wherein the ferroelectric layer is disposed on the first electrode,

wherein the dielectric layer is disposed on the ferroelectric layer,

wherein the barrier dielectric layer is disposed on the dielectric layer, and

wherein the second electrode is disposed on the barrier dielectric layer.

17 . The semiconductor device of claim 16 , further comprising a crystallization seed layer disposed between the first electrode and the ferroelectric layer.

18 . The semiconductor device of claim 17 , wherein the crystallization seed layer includes at least one selected from zirconium oxide, hafnium oxide, zirconium nitride, hafnium nitride, magnesium oxide, and niobium oxide.

19 . The semiconductor device of claim 16 , further comprising an interfacial insulation layer disposed between the barrier dielectric layer and the second electrode.

20 . A semiconductor device comprising:

a first electrode and a second electrode that are spaced apart from each other;

a capacitor dielectric structure disposed between the first electrode and the second electrode, and the capacitor dielectric structure including a ferroelectric layer and a dielectric layer; and

a barrier dielectric layer disposed between one of the first and second electrodes and the capacitor dielectric structure, and the barrier dielectric layer including a ferroelectric material,

wherein the capacitor dielectric structure and the barrier dielectric layer are electrically connected in series to each other to form a dielectric structure, and

wherein a capacitance of the dielectric structure is substantially the same as a capacitance of the capacitor dielectric structure.

21 . A semiconductor device comprising:

a first electrode and a second electrode that are spaced apart from each other;

a capacitor dielectric structure disposed between the first electrode and the second electrode, and the capacitor dielectric structure including a ferroelectric layer and a dielectric layer; and

a barrier dielectric layer disposed between one of the first and second electrodes and the capacitor dielectric structure, and the barrier dielectric layer including a ferroelectric material,

wherein an absolute value of a capacitance of the barrier dielectric layer is greater than an absolute value of a capacitance of the ferroelectric layer.