Pixel driving circuit and display device
The present embodiments disclose a pixel driving circuit. A pixel driving circuit according to an embodiment of the present disclosure is electrically connected to a luminous element and comprises a first circuit configured to control light-emission and non-emission of the luminous element in response to a control signal applied to each of a plurality of subframes included in a frame, a second circuit configured to store bit values of multi-bit data in the frame and generate the control signal based on the stored bit values, and a clock signal such that each subframe included in the frame is controlled according to each bit value, and wherein each of the plurality of subframes includes a data-writing period and a light-emitting period, during the data-writing period of each subframe, the second circuit receives and stores a corresponding bit string from among a plurality of bit strings of n-bit data, wherein the plurality of bit strings are generated by a combination of bits in the number of n, which is smaller than m, from among m bits constituting a bit string of the multi-bit data, and the n-bit data is a bit string in which n bits from among the m bits are combined such that a difference in light-emitting periods of the plurality of subframes is minimized.
1. A pixel driving circuit electrically connected to a luminous element, the circuit comprising:
a first circuit configured to control light-emission and non-emission of the luminous element in response to a control signal applied to each of a plurality of subframes included in a frame,
a second circuit configured to store bit values of multi-bit data in the frame, and generate the control signal based on the stored bit values and a clock signal such that each subframe included in the frame is controlled according to each bit value, and
wherein each of the plurality of subframes includes a data-writing period and a light-emitting period,
during the data-writing period of each subframe, the second circuit receives and stores a corresponding bit string from among a plurality of bit strings of n-bit data, wherein the plurality of bit strings are generated by a combination of bits in the number of n, which is smaller than m, from among m bits constituting a bit string of the multi-bit data, and
the n-bit data is a bit string in which n bits from among the m bits are combined such that a difference in light-emitting periods of the plurality of subframes is minimized.
2. The pixel driving circuit of claim 1 , wherein
n is (m/2)+1 or (m/2)−1, and
two bit strings from among the bit strings of the n-bit data include, as a common bit, at least one bit of the bit string of the m-bit data, and a time allocated to the common bit is half a time allocated to the at least one bit in the bit string of the m-bit data.
3. The pixel driving circuit of claim 1 , wherein n is m/2,
the bit strings of the n-bit data do not include bits at the same positions among the m bits, and
sums of time allocated to each bit of the respective bit strings of the n-bit data are approximate to one another.
4. The pixel driving circuit of claim 1 , wherein the first circuit includes
a first transistor configured to output a driving current and
a second transistor configured to transmit or block the driving current to the luminous element according to the control signal.
5. The pixel driving circuit of claim 4 , wherein the first circuit includes a level shifter that converts a voltage level of the control signal.
6. The pixel driving circuit of claim 1 , wherein the second circuit includes
a memory configured to store the bit values of the multi-bit data and
a pulse width modulation (PWM) controller configured to read the bit values from the memory and determine a pulse width of the control signal for a subframe based on a length of the subframe and a bit value corresponding to the subframe.
7. A display device comprising:
a pixel unit including a plurality of pixels, each including a luminous element and a pixel circuit connected to the luminous element;
a current supply unit configured to supply a driving current to the plurality of pixels; and
a clock generator configured to supply a clock signal to the plurality of pixels when each of a plurality of subframes constituting a frame starts,
wherein the pixel circuit of each pixel includes
a first circuit configured to control light-emission and non-emission of the luminous element in response to a control signal applied to each of a plurality of subframes included in a frame,
a second circuit configured to store bit values of multi-bit data in the frame, and generate the control signal based on the stored bit values and a clock signal such that each subframe included in the frame is controlled according to each bit value, and
wherein the each of the plurality of subframes includes a data-writing period and a light-emitting period,
during the data-writing period of each subframe, the second circuit receives and stores a corresponding bit string from among a plurality of bit strings of n-bit data, wherein the plurality of bit strings are generated by a combination of bits in the number of n, which is smaller than m, from among m bits constituting a bit string of the multi-bit data, and
the n-bit data is a bit string in which n bits from among the m bits are combined such that a difference in light-emitting periods of the plurality of subframes is minimized.