IP Library Granted Patent US 12,132,085
Granted Patent B2
US 12,132,085 · App. 18/114,632 · Granted Oct 29, 2024

SiC substrate and sic epitaxial wafer

Inventors: Hiromasa Suo (Ichihara, JP); Rimpei Kindaichi (Yokohama, JP)
Assignee: Resonac Corporation
H01L29/1608H01L21/67288H01L22/12
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Quick Facts
Patent No.
US 12,132,085
App. No.
18/114,632
Granted
Oct 29, 2024
Kind
B2
Abstract

The SiC substrate has a warpage factor F of 300 μm or less, which is obtained from the thickness, the diameter, and a stress at a first outer circumferential end 10 mm inward from an outer circumferential end in the [11-20] direction from a center thereof.

Claims (63)

1. A SiC substrate having a warpage factor F of 300 μm or less represented by the following formula (1) obtained from a thickness, a diameter, and a stress at a first outer circumferential end 10 mm inward from an outer circumferential end in the [11-20] direction from a center thereof,

F=K ×exp( a+b ×ln(σ)+ c ×ln( R )+ d ×ln( t s ))  (1)

where K, a, b, c, and d are constants satisfying K=1.3373, a=−11.67123, b=1.4030953, c=1.8050972, and d=−1.585898,

σ satisfies σ=60 (MPa)−⅔×S (MPa),

S is internal stress in the <1-100> direction, which is the same direction as a circumferential direction of the first outer circumferential end, and in which tensile stress is defined as positive and compressive stress is defined as negative,

t s is the thickness (mm),

R is the diameter (mm), and

Wherein the diameter is 290 mm or more.

2. The SiC substrate according to claim 1 ,

wherein the warpage factor F is 200 μm or less.

3. The SiC substrate according to claim 1 ,

wherein the warpage factor F is 100 μm or less.

4. The SiC substrate according to claim 1 ,

wherein the warpage factor F is 50 μm or less.

5. The SiC substrate according to claim 1 ,

wherein the diameter is 290 mm or more, and the thickness is 800 μm or less.

6. The SiC substrate according to claim 5 ,

wherein the thickness is 600 μm or less.

7. A SiC epitaxial wafer comprising the SiC substrate according to claim 1 , and a SiC epitaxial layer laminated on one surface of the SiC substrate.

8. A SiC epitaxial wafer comprising the SiC substrate according to claim 2 , and a SiC epitaxial layer laminated on one surface of the SiC substrate.

9. A SiC epitaxial wafer comprising the SiC substrate according to claim 3 , and a SiC epitaxial layer laminated on one surface of the SiC substrate.

10. A SiC epitaxial wafer comprising the SiC substrate according to claim 4 , and a SiC epitaxial layer laminated on one surface of the SiC substrate.

11. A SiC epitaxial wafer comprising the SiC substrate according to claim 5 , and a SiC epitaxial layer laminated on one surface of the SiC substrate.

12. A SiC epitaxial wafer comprising the SiC substrate according to claim 6 , and a SiC epitaxial layer laminated on one surface of the SiC substrate.

13. The SiC substrate according to claim 1 ,

wherein the SiC substrate having the warpage factor F of 300 μm or less is a SiC substrate before a processed layer is formed on a surface of the SiC substrate.

14. A SiC epitaxial wafer comprising the SiC substrate according to claim 13 , and a SiC epitaxial layer laminated on one surface of the SiC substrate.

15. A SiC substrate having a warpage factor F of 100 μm or less represented by the following formula (1) obtained from a thickness, a diameter, and a stress at a first outer circumferential end 10 mm inward from an outer circumferential end in the [11-20] direction from a center thereof,

F=K ×exp( a+b ×ln(σ)+ c ×ln( R )+ d ×ln( t s ))  (1)

where K, a, b, c, and d are constants satisfying K=1.3373, a=−11.67123, b=1.4030953, c=1.8050972, and d=−1.585898,

σ satisfies σ−60 (MPa)−⅔×S (MPa),

S is internal stress in the <1-100> direction, which is the same direction as a circumferential direction of the first outer circumferential end, and in which tensile stress is defined as positive and compressive stress is defined as negative,

t s is the thickness (mm),

R is the diameter (mm),

wherein the diameter is 145 mm or more.

16. The SiC substrate according to claim 15 ,

wherein the warpage factor F is 50 μm or less.

17. The SiC substrate according to claim 15 ,

wherein the thickness is 300 μm or less.

18. A SiC epitaxial wafer comprising the SiC substrate according to claim 15 , and a SiC epitaxial layer laminated on one surface of the SiC substrate.

19. A SiC epitaxial wafer comprising the SiC substrate according to claim 16 , and a SiC epitaxial layer laminated on one surface of the SiC substrate.

20. A SiC epitaxial wafer comprising the SiC substrate according to claim 17 , and a SiC epitaxial layer laminated on one surface of the SiC substrate.

21. A SiC substrate having a warpage factor F of 200 μm or less represented by the following formula (1) obtained from a thickness, a diameter, and a stress at a first outer circumferential end 10 mm inward from an outer circumferential end in the [11-20] direction from a center thereof,

F=K ×exp( a+b ×ln(σ)+ c ×ln( R )+ d ×ln( t s ))  (1)

where K, a, b, c, and d are constants satisfying K=1.3373, a=−11.67123, b=1.4030953, c=1.8050972, and d=−1.585898,

σ satisfies σ−60 (MPa)−⅔×S (MPa),

S is internal stress in the <1-100> direction, which is the same direction as a circumferential direction of the first outer circumferential end, and in which tensile stress is defined as positive and compressive stress is defined as negative,

t s is the thickness (mm),

R is the diameter (mm),

wherein the diameter is 195 mm or more.

22. The SiC substrate according to claim 21 ,

wherein the warpage factor F is 100 μm or less.

23. The SiC substrate according to claim 21 ,

wherein the warpage factor F is 50 μm or less.

24. The SiC substrate according to claim 21 ,

wherein the thickness is 600 μm or less.

25. The SiC substrate according to claim 21 ,

wherein the thickness is 400 μm or less.

26. A SiC epitaxial wafer comprising the SiC substrate according to claim 21 , and a SiC epitaxial layer laminated on one surface of the SiC substrate.

27. A SiC epitaxial wafer comprising the SiC substrate according to claim 22 , and a SiC epitaxial layer laminated on one surface of the SiC substrate.

28. A SiC epitaxial wafer comprising the SiC substrate according to claim 23 , and a SiC epitaxial layer laminated on one surface of the SiC substrate.

29. A SiC epitaxial wafer comprising the SiC substrate according to claim 24 , and a SiC epitaxial layer laminated on one surface of the SiC substrate.

30. A SiC epitaxial wafer comprising the SiC substrate according to claim 25 , and a SiC epitaxial layer laminated on one surface of the SiC substrate.

Assignments (2)
CHANGE OF ADDRESS Recorded Feb 9, 2024
From: RESONAC CORPORATION
To: RESONAC CORPORATION
Reel/Frame 066547/0677 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 26, 2023
From: SUO, HIROMASA; KINDAICHI, RIMPEI
To: RESONAC CORPORATION
Reel/Frame 064064/0350 →
Priority Claims (1)
JP 2022-089095 · May 31, 2022 · national
Continuity (1)
Related Publication 20230387214A1 · Nov 30, 2023