Organic interposer including intra-die structural reinforcement structures and methods of forming the same
An organic interposer includes dielectric material layers embedding redistribution interconnect structures, package-side bump structures located on a first side of the dielectric material layers, and die-side bump structures located on a second side of the dielectric material layers. A gap region is present between a first area including first die-side bump structures and a second area including second die-side bump structures. Stress-relief line structures are located on, or within, the dielectric material layers within an area of the gap region in the plan view. Each stress-relief line structures may include straight line segments that laterally extend along a respective horizontal direction and is not electrically connected to the redistribution interconnect structures. The stress-relief line structures may include the same material as, or may include a different material from, a metallic material of the redistribution interconnect structures or bump structures that are located at a same level.
1. A method of forming an organic interposer, comprising:
forming package-side bump structures embedded in a package-side dielectric material layer over a carrier substrate;
forming interconnect-level dielectric material layers and redistribution interconnect structures over the package-side bump structures;
forming a die-side dielectric material layer over the interconnect-level dielectric material layers;
forming die-side bump structures over the die-side dielectric material layer, wherein the die-side bump structures comprise first die-side bump structures located in a first area and second die-side bump structures located in a second area that is laterally spaced apart from the first area by a gap region that is free of any die-side bump structure in a plan view; and
forming stress-relief line structures within, or on, one of the package-side dielectric material layer, the interconnect-level dielectric material layer, or the die-side dielectric material layer within an area of the gap region in the plan view, wherein the stress-relief line structures are not electrically connected to the redistribution interconnect structures, wherein the stress-relief line structures comprise a different material than a metallic component located at a same level as the stress-relief line structures.
2. The method of claim 1 , wherein each of the stress-relief line structures comprises straight line segments that laterally extend along a respective horizontal direction.
3. The method of claim 1 , wherein the metallic component is selected from:
the package-side bump structures;
the redistribution interconnect structures; and
the die-side bump structures.
4. The method of claim 1 , wherein the stress-relief line structures comprises a material having a lower Young's modulus than a Young's modulus of the metallic component.
5. The method of claim 1 , wherein the stress-relief line structures are formed by:
depositing a blanket material layer over the carrier substrate, the package-side dielectric material layer, the interconnect-level dielectric material layer, or the die-side dielectric material layer;
applying and patterning a photoresist layer over the blanket material layer; and
transferring a pattern in the photoresist layer through the blanket material layer.
6. The method of claim 5 , wherein:
patterned portions of the blanket material layer comprise the stress-relief line structures; and
each of the stress-relief line structures comprises a respective set of straight line segments that are parallel to one another.
7. A method of forming an organic interposer, comprising:
forming package-side bump structures embedded in a package-side dielectric material layer over a carrier substrate;
forming interconnect-level dielectric material layers and redistribution interconnect structures over the package-side bump structures;
forming a die-side dielectric material layer over the interconnect-level dielectric material layers;
forming die-side bump structures over the die-side dielectric material layer, wherein the die-side bump structures comprise first die-side bump structures located in a first area and second die-side bump structures located in a second area that is laterally spaced apart from the first area by a gap region that is free of any die-side bump structure in a plan view; and
forming stress-relief line structures within an area of the gap region in the plan view, wherein the stress-relief line structures are located at a same level as a metallic component which is the package-side bump structures or the die-side bump structures,
wherein the stress-relief line structures comprise a different material than the metallic component.
8. The method of claim 7 , wherein the stress-relief line structures are formed within, or on, one of the package-side dielectric material layer, the interconnect-level dielectric material layer, or the die-side dielectric material layer.
9. The method of claim 7 , wherein the stress-relief line structures comprises a material having a lower Young's modulus than a Young's modulus of the metallic component.
10. The method of claim 7 , wherein the stress-relief line structures are formed by:
depositing a blanket material layer over the carrier substrate, the package-side dielectric material layer, the interconnect-level dielectric material layer, or the die-side dielectric material layer;
applying and patterning a photoresist layer over the blanket material layer; and
transferring a pattern in the photoresist layer through the blanket material layer,
wherein:
patterned portions of the blanket material layer comprise the stress-relief line structures; and
each of the stress-relief line structures comprises a respective set of straight line segments that are parallel to one another.
11. A method of forming an organic interposer, the method comprising:
forming dielectric material layers embedding redistribution interconnect structures;
forming package-side bump structures on a first side of the dielectric material layers and connected to a package-side subset of the redistribution interconnect structures;
forming stress-relief line structures on, or within, the dielectric material layers, wherein the dielectric material layers comprise a die-side dielectric material layer, the stress-relief line structures are in contact with a horizontal surface of the die-side dielectric material layer, and the stress-relief line structures have a same material composition as, and a same thickness as, the die-side bump structures; and
forming die-side bump structures on a second side of the dielectric material layers, wherein the die-side bump structures are connected to a die-side subset of the redistribution interconnect structures, and comprise a respective horizontal surface contacting the horizontal surface of the die-side dielectric material layer.
12. The method of claim 11 , wherein:
the die-side bump structures comprise first die-side bump structures located in a first area and second die-side bump structures located in a second area that is laterally spaced apart from the first area by a gap region that is free of any die-side bump structure in a plan view; and
the stress-relief line structures are formed within an area of the gap region in the plan view.
13. The method of claim 11 , wherein each of the stress-relief line structures comprises straight line segments that laterally extend along a respective horizontal direction and is not electrically connected to the redistribution interconnect structures.
14. The method of claim 11 , wherein each of the stress-relief line structures comprises:
first straight line segments that laterally extend along a first horizontal direction; and
second straight line segments that laterally extend along a second horizontal direction that is different from the first horizontal direction.
15. The method of claim 14 , wherein sidewalls of the first straight line segments and sidewalls of the second straight line segments of each of the stress-relief line structures are adjoined to one another by vertical edges.
16. The method of claim 14 , wherein the straight line segments are interconnected to one another by curved line segments having curved sidewalls.
17. The method of claim 1 , wherein the package-side dielectric material layer embeds the stress-relief line structures.
18. The method of claim 1 , wherein the package-side bump structures have a different thickness than the stress-relief line structures.
19. The method of claim 1 , wherein the stress-relief line structures comprises an interconnected mesh having a grid pattern.
20. The method of claim 1 , wherein a plurality of stress-relief line structures among the stress-relief line structures comprises a respective set of line segments that are adjoined among one another at a respective angle.