IP Library Granted Patent US 12,575,029
Granted Patent B2
US 12,575,029 · App. 18/127,295 · Granted Mar 10, 2026

Wiring board

Inventors: Takeshi Takada (Tokyo, JP); Yuki Umemura (Tokyo, JP)
Assignee: TOPPAN INC.
H05K1/09H05K3/42H05K3/46H05K2201/0137H05K2203/072
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Quick Facts
Patent No.
US 12,575,029
App. No.
18/127,295
Granted
Mar 10, 2026
Kind
B2
Abstract

A wiring board includes a first wiring layer disposed on the first adhesion layer; and a second wiring layer disposed on the second adhesion layer, wherein a proportion of copper remaining in the first wiring layer is represented by C=B/A (%), where A is a total area of the first wiring layer, B is an area of copper in the first wiring layer, and C is a remaining copper ratio C defined as the proportion of copper remaining in the first wiring layer, and wherein when the remaining copper ratio C is set to 70 to 100%, the first adhesion layer is comprised of at least one material having a first predetermined Young's modulus, and the first wiring layer is comprised of at least one material having a second predetermined Young's modulus, the first predetermined Young's modulus being 0.1 to 0.85 times the second predetermined Young's modulus.

Claims (18)

1 . A wiring board, comprising:

a glass core member having:

a first major surface;

a second major surface opposite the first major surface; and

through holes penetrating the glass core member between the first major surface and the second major surface, each of the through holes having a first end adjacent the first major surface, a second end adjacent the second major surface, and a bottom portion at the second end;

a first adhesion layer in close contact with the first major surface and respective inner walls of the through holes, the first adhesion layer having portions each closing the bottom portion of a respective one of the through holes;

a second adhesion layer in close contact with the second major surface and the portions of the first adhesion layer;

a first wiring layer disposed on the first adhesion layer; and

a second wiring layer disposed on the second adhesion layer, wherein

a proportion of remaining copper on the first major surface is set to 70 to 100%, a proportion of remaining copper of the second major surface is within 10% of the proportion of remaining copper on the first major surface, the first adhesion layer is comprised of at least one material having a first predetermined Young's modulus, and the first wiring layer is comprised of at least one material having a second predetermined Young's modulus, the first predetermined Young's modulus being 0.1 to 0.85 times the second predetermined Young's modulus,

wherein:

the first adhesion layer comprises a Ti film and a Cu film; and

the first wiring layer comprises Cu.

2 . The wiring board of claim 1 , wherein:

part of the first adhesion layer and the first wiring layer are comprised of electroless plating.

3 . The wiring board of claim 1 , wherein:

the first wiring layer comprises one or more dummy wirings.

4 . The wiring board of claim 1 , wherein the first adhesion layer further comprises a Ni film.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 28, 2023
From: TAKADA, TAKESHI; UMEMURA, YUKI
To: TOPPAN INC.
Reel/Frame 063128/0789 →
Priority Claims (1)
JP 2020-161639 · Sep 28, 2020 · national
Continuity (2)
Continuation PCTJP2021034064 · Sep 16, 2021
Related Publication 20230240009A1 · Jul 27, 2023
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