IP Library Granted Patent US 12,498,337
Granted Patent B2
US 12,498,337 · App. 18/128,330 · Granted Dec 16, 2025

Measurement system and measurement method

Inventor: Akiyuki Sugiyama (Tokyo, JP)
Assignee: Hitachi High-Tech Corporation
G01N23/2251
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Quick Facts
Patent No.
US 12,498,337
App. No.
18/128,330
Granted
Dec 16, 2025
Kind
B2
Abstract

Provided is a technology that can reduce the work burden of setting measurement conditions for each circuit pattern when the same measurement procedure is performed on a plurality of circuit patterns formed on a semiconductor material. A measurement system according to the present disclosure sets a measurement point set in a reference circuit pattern for another circuit pattern having the same circuit pattern, applies inversion or rotation to the measurement point, and performs setting on the other circuit pattern, when the circuit pattern has a circuit pattern obtained by vertically inverting, horizontally inverting, or rotating a circuit pattern the same as the reference circuit pattern.

Claims (30)

1 . A measurement system that measures a circuit pattern formed on a semiconductor material, the system characterized by comprising:

a computer system that generates a measurement recipe for defining a procedure in which a measurement device measures the circuit pattern, characterized in that

the computer system sets a measurement point for measurement by using the measurement recipe on a reference circuit pattern in design data in which a design layout of the circuit pattern is described,

the computer system sets the measurement point set on the reference circuit pattern for another circuit pattern having the same circuit pattern as the reference circuit pattern in the design data,

the computer system applies inversion or rotation to the measurement point and performs setting on the other circuit pattern, when the other circuit pattern has a circuit pattern obtained by vertically inverting, horizontally inverting, or rotating a circuit pattern the same as the reference circuit pattern, and

the computer system generates the measurement recipe according to the measurement point set for the other circuit pattern.

2 . The measurement system according to claim 1 , characterized in that

the computer system sets a direction of deflecting a charged particle beam used when the measurement device measures the measurement point, in the reference circuit pattern,

the computer system sets the direction set in the reference circuit pattern, for the other circuit pattern,

the computer system applies inversion or rotation to the direction and performs setting on the other circuit pattern when the other circuit pattern has a circuit pattern obtained by vertically inverting, horizontally inverting, or rotating a circuit pattern the same as the reference circuit pattern, and

the computer system generates the measurement recipe according to the direction set for the other circuit pattern.

3 . The measurement system according to claim 1 , characterized in that

the computer system sets an imaging condition used when the reference circuit pattern is imaged, and

the computer system sets the imaging condition for the other circuit pattern to generate the measurement recipe.

4 . The measurement system according to claim 1 , characterized in that the reference circuit pattern is a standard cell in which a three-dimensional structure of a common circuit pattern that is commonly used between a plurality of circuit patterns formed on the semiconductor material is defined.

5 . The measurement system according to claim 1 , characterized in that the measurement point is a planar position of a contact hole where an electrical connection is formed between a metal line layer and a component of a semiconductor device in the reference circuit pattern.

6 . The measurement system according to claim 1 , characterized in that the computer system generates the measurement recipe so that measurement is performed for each combination of a type of the reference circuit pattern and the measurement point.

7 . The measurement system according to claim 6 , characterized in that the computer system aggregates results of measurement using the measurement recipe for each combination of the type of the reference circuit pattern and the measurement point, calculates statistical values thereof, and outputs results thereof.

8 . The measurement system according to claim 1 , characterized in that

the semiconductor material has another layer pattern different from the reference circuit pattern on a layer different from a layer on which the reference circuit pattern is formed, and

the computer system generates the measurement recipe so as to measure the other layer pattern at a planar position of the measurement point.

9 . The measurement system according to claim 1 , characterized in that

the computer system designates at least a partial area of the semiconductor material, and

the computer system sets the measurement points for the other circuit pattern that exists in the area and does not set the measurement points for the other circuit pattern that exists outside the area.

10 . A measurement method of measuring a circuit pattern formed on a semiconductor material, the method characterized by comprising:

a step of generating a measurement recipe for defining a procedure in which a measurement device measures the circuit pattern, characterized in that

in the step of generating the measurement recipe, a measurement point for measurement by using the measurement recipe is set on a reference circuit pattern in design data in which a design layout of the circuit pattern is described,

in the step of generating the measurement recipe, the measurement point set on the reference circuit pattern is set for another circuit pattern having the same circuit pattern as the reference circuit pattern in the design data,

in the step of generating the measurement recipe, inversion or rotation is applied to the measurement point and setting is performed on the other circuit pattern, when the other circuit pattern has a circuit pattern obtained by vertically inverting or rotating a circuit pattern the same as the reference circuit pattern, and

in the step of generating the measurement recipe, the measurement recipe is generated according to the measurement point set for the other circuit pattern.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 31, 2025
From: SUGIYAMA, AKIYUKI
To: HITACHI HIGH-TECH CORPORATION
Reel/Frame 072748/0319 →
Priority Claims (1)
JP 2022-060565 · Mar 31, 2022 · national
Continuity (1)
Related Publication 20230314350A1 · Oct 5, 2023
References Cited (7)
US 5086477A · Yu et al. · 1992 [cited by applicant]
US 20090039263A1 · Matsuoka et al. · 2009 [cited by applicant]
US 20220179321A1 · Ma et al. · 2022 [cited by applicant]
US 20230194253A1 · Kagetani · 2023 [cited by examiner]
JP 200943937A · 2009 [cited by applicant]
TW 202206950A · 2002 [cited by applicant]
Chinese-language Office Action issued in Taiwanese Application No. 112112126 dated Aug. 29, 2024 with partial English translation (10 pages). [cited by applicant]