Granted Patent B1

US 12,488,275 · App. 18/132,128 · Granted Dec 2, 2025

Inventors: Lior Ella (Tel Aviv, IL); Nir Halay (Tel Aviv, IL); Ori Weber (Tel Aviv, IL); Uri Abend (Tel Aviv, IL); Yonatan Cohen (Tel Aviv, IL); Nissim Ofek (Tel Aviv, IL); Itamar Sivan (Tel Aviv, IL)

Assignee: Q.M Technologies Ltd.

G06N10/80G06F13/42

Abstract

Claims (93)

1 . A system comprising:

an application circuit, operable, according to a classical control flow, to generate a plurality of waveforms;

a generation buffer circuit configured to store the plurality of waveforms; and

an execution controller circuit operable to play the plurality of waveforms, wherein:

the playing of the plurality of waveforms enables a generation of a plurality of consecutive quantum control pulses,

each consecutive quantum control pulse is generated according to one or more waveforms of the plurality of waveforms, and

the playing of the plurality of waveforms enables a reshaping of the one or more waveforms of the plurality of waveforms to generate the plurality of consecutive quantum control pulses.

2 . The system of claim 1 , wherein:

the application circuit is configured to write each of the plurality of waveforms to the generation buffer circuit, wherein the plurality of waveforms comprise a plurality of analog waveforms and a plurality of digital waveforms, and

each analog waveform of the plurality of analog waveforms comprises one or more multibit values that correspond to an analog signal.

3 . The system of claim 1 , wherein:

the application circuit is configured to independently write more than one waveform, at a time, to the generation buffer circuit.

4 . The system of claim 1 , wherein:

the generation buffer circuit comprises a plurality of generation buffers, and

the application circuit is configured to write to the plurality of generation buffers independently.

5 . The system of claim 1 , wherein:

the application circuit is configured to generate a plurality of modification commands;

the system comprises a modification buffer circuit configured to store the plurality of modification commands; and

the execution controller circuit is operable to:

read a modification command, of the plurality of modification commands, from the modification buffer circuit, and

modify a waveform, of the plurality of waveforms, according to the modification command.

6 . The system of claim 5 , wherein:

each modification command of the plurality of modification commands corresponds to a buffer location, and

the buffer location is associated with an address, within the modification buffer circuit, where each modification command is written.

7 . The system of claim 5 , wherein:

the modification buffer circuit comprises a plurality of modification buffers,

each modification command, of the plurality of modification commands, corresponds to a channel index, and

the channel index identifies a modification buffer, of the plurality of modification buffers, to which each modification command is written.

8 . The system of claim 5 , wherein:

two or more modification commands, of the plurality of modification commands, are written to the modification buffer circuit simultaneously.

9 . The system of claim 5 , wherein:

the generation buffer circuit comprises a plurality of generation buffers,

the modification buffer circuit comprises a plurality of modification buffers,

the execution controller circuit comprises a plurality of execution controllers,

each channel, of a plurality of channels, comprise one generation buffer, of the plurality of generation buffers, one modification buffer, of the plurality of modification buffers, and one execution controller, of the plurality of execution controllers,

each execution commands, of a plurality of execution commands, is associated with a channel index, and

the channel index identifies the channel, of the plurality of channels, from which the one or more waveforms and the modification command are read.

10 . The system of claim 8 , wherein:

two or more execution commands, of the plurality of execution commands, operate simultaneously on two or more channels.

11 . The system of claim 1 , wherein the application circuit is one of a plurality of application circuits in a pulse processor of a quantum computer.

12 . The system of claim 1 , wherein the plurality of waveforms comprises samples of analog waveforms and samples of digital waveforms.

13 . The system of claim 1 , wherein the execution controller circuit is operable to play the plurality of consecutive quantum control pulses continually during a lifetime of a qubit without any computational gaps.

14 . The system of claim 1 , wherein:

the execution controller circuit is operable to send one or more waveforms to a digital-to-analog converter (DAC) according to a DAC index fetched from the generation buffer circuit.

15 . The system of claim 1 , wherein:

the execution controller circuit is operable to fetch a plurality of samples, at the same time, from the generation buffer circuit; and

each of the plurality of samples may be fetched according to a different DAC index.

16 . The system of claim 1 , wherein:

the execution controller circuit is operable to simultaneously send one or more waveforms to a plurality of DACs.

17 . A method comprising:

writing, via an application circuit, according to a first control flow, a plurality of waveforms to a generation buffer circuit;

playing, via an execution controller circuit, according to a second control flow that is different than the first control flow, one or more waveforms of the plurality of waveforms from the generation buffer circuit; and

generating, via the execution controller circuit, a plurality of consecutive quantum control pulses, wherein each consecutive quantum control pulse is generated according to a reshaping of at least one waveform as the plurality of waveforms that are played.

18 . The method of claim 17 , wherein the method comprises:

writing, via the application circuit, a plurality of modification commands to a modification buffer circuit;

reading, via the execution controller circuit, a modification command, of the plurality of modification commands, from the modification buffer circuit; and

modifying, via the execution controller circuit, one or more waveforms according to the modification command.

19 . The method of claim 18 , wherein:

each modification command of the plurality of modification commands corresponds to a buffer location, and

writing the plurality of modification commands to the modification buffer circuit comprises writing each modification command to an address, in the modification buffer circuit, associated with the corresponding buffer location.

20 . The method of claim 18 , wherein:

the modification buffer circuit comprises a plurality of modification buffers,

each modification command, of the plurality of modification commands, corresponds to a channel index, and

writing the plurality of modification commands to the modification buffer circuit comprises writing each modification command to a modification buffer, of the plurality of modification buffers, identified by the corresponding channel index.

21 . The method of claim 18 , wherein:

writing the plurality of modification commands to the modification buffer circuit comprises writing two or more modification commands, of the plurality of modification commands, to the modification buffer circuit simultaneously.

22 . The method of claim 18 , wherein:

the generation buffer circuit comprises a plurality of generation buffers,

the modification buffer circuit comprises a plurality of modification buffers,

each channel, of a plurality of channels, comprise one generation buffer, of the plurality of generation buffers, and one modification buffer, of the plurality of modification buffers,

playing the one or more waveforms, of the plurality of waveforms, from the generation buffer circuit comprises reading from a channel identified by a channel index,

reading the modification command, of the plurality of modification commands, from the modification buffer circuit comprises reading from the channel identified by the channel index, and

the modified one or more waveforms are associated with the channel identified by the channel index.

23 . The method of claim 22 , wherein:

two or more modification commands, of a plurality of modification commands, operate simultaneously on two or more waveforms.

24 . The method of claim 17 , wherein the plurality of waveforms are written to the generation buffer circuit by an application circuit, and wherein the application circuit is one of a plurality of application circuits in a pulse processor of a quantum computer.

25 . The method of claim 17 , wherein:

playing comprises sending one or more waveforms to a digital-to-analog converter (DAC).

26 . The method of claim 17 , wherein:

playing comprises simultaneously sending one or more waveforms to a plurality of DACs.

27 . The method of claim 17 , wherein:

each waveform, of the plurality of waveforms, comprise a multibit value corresponding to an analog signal.

28 . The method of claim 17 , wherein:

writing the plurality of waveforms to the generation buffer circuit comprises independently writing more than one waveform, at a time, to the generation buffer circuit.

29 . The method of claim 17 , wherein the plurality of waveforms comprises samples of analog waveforms and samples of digital waveforms.

30 . The method of claim 17 , wherein playing comprises playing the plurality of consecutive quantum control pulses continually during a lifetime of a qubit.

31 . The method of claim 17 , wherein:

the method comprises sending, via the execution controller circuit, one or more waveforms to a digital-to-analog converter (DAC) according to a DAC index fetched from the generation buffer circuit.

32 . The method of claim 17 , wherein:

the method comprises: simultaneously fetching, via the execution controller circuit, a plurality of samples from the generation buffer circuit according to a plurality of different DAC indices.

33 . The method of claim 17 , wherein:

the generation buffer circuit comprises a plurality of generation buffers, and

writing the plurality of waveforms to the generation buffer circuit comprises writing to the plurality of generation buffers independently.

Assignments (1)

Continuity (1)

References Cited (185)