Hardware-efficient calibration framework for quantum computing devices

1. A system, comprising:

a processor that executes computer executable components stored in a memory, wherein the computer executable components comprise:

an echo pattern component that generates an echo sequence based on a Pauli term, wherein the echo sequence amplifies the Pauli term; and

a pulse component that generates a pulse sequence to calibrate a multi-qubit gate using the echo sequence.

2. The system of claim 1 , wherein the echo pattern component generates the echo sequence using a commutation set comprising the Pauli term and a plurality of Pauli terms that each commute with the Pauli term, wherein at least one Pauli term within the plurality of Pauli terms anti-commutes with remaining Pauli terms in the plurality of Pauli terms.

3. The system of claim 1 , wherein the echo pattern component generates the echo sequence using a reduced commutation set comprising a subset of a commutation set, and wherein the reduced commutation set facilitates reducing a length of the echo sequence.

4. The system of claim 1 , further comprising:

a cross-point component that identifies a pulse parameter within a parameter scan range using a cross point between a pair of calibration curves.

5. The system of claim 4 , wherein the cross-point component further reduces an error associated with the pulse parameter by increasing a number of echo sequence repetitions and reducing the parameter scan range.

6. The system of claim 1 , further comprising an initial state component that determines a pair of initial stabilizer states using the Pauli term.

7. The system of claim 1 , further comprising a measurement basis component that determines a projection basis of a qubit using the Pauli term.

8. The system of claim 1 , wherein the Pauli term is determined for an input calibration parameter using a hardcoded lookup table.

9. The system of claim 1 , wherein the multi-qubit gate is comprised of a plurality of qubits, the system further comprising:

a controller unit that is coupled to one or more qubits of the plurality of qubits, wherein the controller unit includes the processor.

10. The system of claim 9 , wherein the controller unit is managed by a host processor, and wherein communication between the host processor and the controller unit utilizes bit-strings encoding Pauli terms.

11. A computer-implemented method, comprising:

generating, by a system operatively coupled to a processor, an echo sequence based on a Pauli term, wherein the echo sequence amplifies the Pauli term; and

generating, by the system, a pulse sequence to calibrate a multi-qubit gate using the echo sequence.

12. The computer-implemented method of claim 11 , further comprising:

identifying, by the system, an optimal pulse parameter within a parameter scan range using a cross point between a pair of calibration curves.

13. The computer-implemented method of claim 11 , wherein the generating the echo sequence comprises finding, by the system, a maximum clique with anti-commutation elements of a commutation set comprising the Pauli term.

14. The computer-implemented method of claim 11 , wherein the generating the echo sequence comprises:

sequentially arranging, by the system, a reduced commutation set of Pauli terms to form a sequence of Pauli terms, wherein the reduced commutation set is a first size and a commutation set is a second size, and wherein the first size is less than the second size; and

appending, by the system, a final Pauli term to the sequence of Pauli terms to generate the echo sequence, wherein the final Pauli term renders the echo sequence unitary.

15. The computer-implemented method of claim 11 , wherein the generating the echo sequence comprises using a reduced commutation set comprising a subset of a commutation set, and wherein the reduced commutation set facilitates reducing a length of the echo sequence.

16. The computer-implemented method of claim 12 , further comprising:

reducing, by the system, an error associated with the optimal pulse parameter by increasing a number of echo sequence repetitions and reducing the parameter scan range.

17. A computer program product for hardware-efficient calibration of quantum computing devices, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions executable by a processor to cause the processor to:

generate an echo sequence based on a Pauli term, wherein the echo sequence amplifies the Pauli term; and

generate a pulse sequence to calibrate a multi-qubit gate using the echo sequence.

18. The computer program product of claim 17 , the program instructions executable by the processor to further cause the processor to:

identify a pulse parameter within a parameter scan range using a cross point between a pair of calibration curves.

19. The computer program product of claim 18 , the program instructions executable by the processor to further cause the processor to:

reduce an error associated with the pulse parameter by increasing a number of echo sequence repetitions and reducing the parameter scan range.

20. The computer program product of claim 17 , wherein the processor generates the echo sequence using a reduced commutation set comprising a subset of a commutation set, wherein the reduced commutation set is a first size and the commutation set is a second size, wherein the first size is less than the second size, and wherein the reduced commutation set facilitates reducing a length of the echo sequence.

21. The computer program product of claim 17 , wherein the echo sequence is stored in memory, and wherein the processor retrieves the echo sequence from the memory to generate the pulse sequence.