Polar coding systems, procedures, and signaling
Systems, methods, and instrumentalities are disclosed for interleaving coded bits. A wireless transmit/receive unit (WTRU) may generate a plurality of polar encoded bits using polar encoding. The WTRU may divide the plurality of polar encoded bits into sub-blocks of equal size in a sequential manner. The WTRU may apply sub-block wise interleaving to the sub-blocks using an interleaver pattern. The sub-blocks associated with a subset of the sub-blocks may be interleaved, and sub-blocks associated with another subset of the sub-blocks may not be interleaved. The sub-block wise interleaving may include applying interleaving across the sub-blocks without interleaving bits associated with each of the sub-blocks. The WTRU may concatenate bits from each of the interleaved sub-blocks to generate interleaved bits, and store the interleaved bits associated with the interleaved sub-blocks in a circular buffer. The WTRU may select a plurality of bits for transmission from the interleaved bits.
1. A method implemented by a wireless transmit/receive unit (WTRU), the method comprising:
generating a plurality of uplink control information (UCI) bits to be transmitted in a codeword;
applying a polar code to the UCI bits, wherein a mother code length associated with the polar code is determined based on a codeword length for transmission of the UCI, and wherein the mother code length is greater than the codeword length;
performing rate matching on the polar coded UCI bits, wherein the rate matching comprises a puncturing scheme if a code rate for the codeword is less than a threshold, and wherein the rate matching comprises a shortening scheme if the code rate for the codeword is greater than the threshold; and
transmitting the rate matched, polar coded UCI bits.
2. The method of claim 1 , wherein the mother code length is determined based on the code rate.
3. The method of claim 1 , wherein the codeword comprises a plurality of cyclic redundancy check (CRC) bits.
4. The method of claim 1 , wherein the code rate corresponds to a number of UCI bits and cyclic redundancy check (CRC) bits in the codeword divided by a number of coded bits in the codeword.
5. The method of claim 1 , wherein the polar code comprises a concatenated polar code.
6. The method of claim 5 , further comprising performing the rate matching on the concatenated polar code.
7. A wireless transmit/receive unit (WTRU) comprising:
a processor configured to:
generate a plurality of uplink control information (UCI) bits to be transmitted in a codeword;
apply a polar code to the UCI bits, wherein a mother code length associated with the polar code is determined based on a codeword length for transmission of the UCI;
determine that the mother code length is greater than the codeword length;
perform rate matching on the polar coded UCI bits, wherein the rate matching comprises a puncturing scheme if a code rate for the codeword is less than a threshold, and wherein the rate matching comprises a shortening scheme if the code rate for the codeword is greater than the threshold; and
transmit the rate matched, polar coded UCI bits.
8. The WTRU of claim 7 , wherein the processor is configured to:
determine the mother code length based on the code rate.
9. The WTRU of claim 7 , wherein the codeword comprises a plurality of cyclic redundancy check (CRC) bits.
10. The WTRU of claim 7 , wherein the processor is configured to:
determine the code rate based on a number of UCI bits and cyclic redundancy check (CRC) bits in the codeword divided by a number of coded bits in the codeword.
11. The WTRU of claim 7 , wherein the polar code comprises a concatenated polar code.
12. The WTRU of claim 11 , wherein the processor is configured to:
determine the mother code length associated with the polar code based on the codeword length for transmission of the UCI.
13. A wireless transmit/receive unit (WTRU) comprising:
a processor configured to:
generate a plurality of uplink control information (UCI) bits to be transmitted in a codeword;
apply a polar code to the UCI bits;
determine a mother code length associated with the polar code based on a codeword length for transmission of the UCI;
perform rate matching on the polar coded UCI bits using a repetition scheme if the mother code length is less than the codeword length;
perform rate matching on the polar coded UCI bits using a puncturing scheme if the mother code length is greater than the codeword length and a code rate for the codeword is less than a threshold;
perform rate matching on the polar coded UCI bits using a shortening scheme if the mother code length is greater than the codeword length and the code rate for the codeword is greater than the threshold; and
transmit the rate matched, polar coded UCI bits.
14. The WTRU of claim 13 , wherein the processor is configured to:
determine the mother code length based on the code rate.
15. The WTRU of claim 13 , wherein the codeword comprises a plurality of cyclic redundancy check (CRC) bits.
16. The WTRU of claim 13 , wherein the processor is configured to:
determine the code rate based on a number of UCI bits and cyclic redundancy check (CRC) bits in the codeword divided by a number of coded bits in the codeword.
17. The WTRU of claim 13 , wherein the polar code comprises a concatenated polar code.
18. The WTRU of claim 17 , wherein the processor is configured to:
determine the mother code length associated with the polar code based on the codeword length for transmission of the UCI.