IP Library Patent Application 18147784
Patent Application
App. No. 18/147,784

SECURE BOOT USING PARALLELIZATION

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Quick Facts
Patent No.
US None
App. No.
18/147,784
Abstract

An apparatus includes a basic input/output system (BIOS) comprising a boot read-only memory (Boot-ROM) to load a first stage boot loader (FSBL) into a random access memory (RAM), a processor comprising at least a first processing core and a second processing core, the processor to initialize, in the first processing core, a first set of system drivers, activate, the second processing core, and load, in the second processing core, a second stage boot loader and one or more operating system images into a main system memory.

Claims (56)

1 . An apparatus comprising:

a basic input/output system (BIOS) comprising a boot read-only memory (Boot-ROM) to load a first stage boot loader (FSBL) into a random access memory (RAM); and

a processor comprising at least a first processing core and a second processing core, the processor to:

initialize, in the first processing core, a first set of system drivers;

activate the second processing core; and

load, in the second processing core, a second stage boot loader and one or more operating system images into a main system memory.

2 . The apparatus of claim 1 , the BIOS to:

establish a hardware root of trust for a computing device.

3 . The apparatus of claim 2 , the first processing core to:

verify the first stage boot loader (FSBL) module.

4 . The apparatus of claim 3 , the first processing core to:

verify the second stage boot loader (SSBL) module.

5 . The apparatus of claim 4 , the first processing core to:

verify the at least one operating system image.

6 . The apparatus of claim 5 , the first processing core to:

authorize the second stage boot loader (SSBL) to complete a boot process.

7 . The apparatus of claim 6 , wherein the second stage boot loader (SSBL) is to:

complete the boot process for the computing device.

8 . A processor-implemented method, comprising:

loading, in a basic input/output system (BIOS) comprising a boot read-only memory (Boot-ROM), a first stage boot loader (FSBL) into a random access memory (RAM);

in a first processing core of a processor:

initializing a first set of system drivers;

activating a second processing core of the processor; and

in the second processing core of the processor:

loading a second stage boot loader and one or more operating system images into a main system memory.

9 . The method of claim 8 , further comprising:

establishing, in the BIOS, a hardware root of trust for a computing device.

10 . The method of claim 9 , further comprising:

verifying, in the first processing core, the second stage boot loader (SSBL) module.

11 . The method of claim 10 , further comprising:

verifying, in the first processing core, the second stage boot loader (SSBL) module.

12 . The method of claim 11 , further comprising:

verifying, in the first processing core, the at least one operating system image.

13 . The method of claim 12 , further comprising:

authorizing, in the first processing core, the second stage boot loader (SSBL) to complete a boot process.

14 . The method of claim 13 , further comprising:

completing, in the second stage boot loader (SSBL) the boot process for the computing device.

15 . At least one non-transitory computer readable medium having instructions stored thereon, which when executed by a processor, cause the processor to execute instructions to perform operations, comprising:

loading, in a basic input/output system (BIOS) comprising a boot read-only memory (Boot-ROM), a first stage boot loader (FSBL) into a random access memory (RAM);

in a first processing core of a processor:

initializing a first set of system drivers;

activating a second processing core of the processor; and

in the second processing core of the processor:

loading a second stage boot loader and one or more operating system images into a main system memory.

16 . The computer readable medium of claim 15 , further comprising instruction which, when executed by processor, cause the processor to perform operations comprising:

establishing, in the BIOS, a hardware root of trust for a computing device.

17 . The computer readable medium of claim 16 , further comprising instruction which, when executed by processor, cause the processor to perform operations comprising:

verifying, in the first processing core, the second stage boot loader (SSBL) module.

18 . The computer readable medium of claim 17 , further comprising instruction which, when executed by processor, cause the processor to perform operations comprising:

verifying, in the first processing core, the second stage boot loader (SSBL) module.

19 . The computer readable medium of claim 18 , further comprising instruction which, when executed by processor, cause the processor to perform operations comprising:

verifying, in the first processing core, the at least one operating system image.

20 . The computer readable medium of claim 19 , further comprising instruction which, when executed by processor, cause the processor to perform operations comprising:

authorizing, in the first processing core, the second stage boot loader (SSBL) to complete a boot process.

21 . The computer readable medium of claim 20 , wherein the at least one agent is to perform operations comprising:

completing, in the second stage boot loader (SSBL) the boot process for the computing device.

Assignments (3)
SECURITY INTEREST Recorded Sep 12, 2025
From: ALTERA CORPORATION
To: BARCLAYS BANK PLC, AS COLLATERAL AGENT
Reel/Frame 073431/0309 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 9, 2025
From: INTEL CORPORATION
To: ALTERA CORPORATION
Reel/Frame 072704/0307 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 24, 2023
From: DENGI, GIRISHA; MURTHY, KARTHIKA; MALE, SANTOSH
To: INTEL CORPORATION
Reel/Frame 062472/0253 →