Partial discharge suppression in high voltage solid-state devices

1. An electronic device, comprising:

a substrate;

a first electrical contact positioned on the substrate; and

a multi-layer encapsulation film surrounding at least a top surface of the first electrical contact and at least part of the substrate, wherein the multi-layer encapsulation film comprises multiple layers of one or more dielectric materials, wherein an interface between two adjacent layers of the multiple layers is configured to include molecular bonds to prevent charge carriers from crossing between the two adjacent layers.

2. The electronic device of claim 1 , wherein the multi-layer encapsulation film is positioned around the substrate such that a plane of a layer of the multi-layer encapsulation film intersects an edge of the substrate in a substantially perpendicular manner.

3. The electronic device of claim 1 , further comprising a second electrical contact that is at least partially surrounded by the multi-layer encapsulation film, wherein the first electrical contact and the second electrical contact are arranged in a series configuration.

4. The electronic device of claim 1 , wherein the one or more dielectric materials comprise at least one of polyimide, epoxy resin, or silicone gel.

5. The electronic device of claim 1 , further comprising a semi-conductive coating positioned between the first electrical contact and the multi-layer encapsulation film.

6. The electronic device of claim 5 , wherein the semi-conductive coating comprises graphite mixed in a dielectric material.

7. The electronic device of claim 1 , wherein the substrate comprises a wide band gap semiconductor material.

8. The electronic device of claim 1 , wherein charge carriers in the substrate of the electronic device are inhibited from crossing into a layer of the multiple layers due to the molecular bonds at an interface between the substrate and the layer.

9. A multi-layer encapsulation configuration for use in an electronic device, comprising:

a first layer of a first dielectric material, and

a second layer of a second dielectric material, wherein an interface between the first layer and the second layer is configured to include molecular bonds to prevent charge carriers from crossing between the first layer and the second layer, and wherein the multi-layer encapsulation configuration is structured to allow at least a top surface of an electrical contact and at least part of a substrate of the electronic device to be surrounded by the multi-layer encapsulation configuration.

10. The multi-layer encapsulation configuration of claim 9 , wherein a thickness of the first layer or the second layer is smaller than 1 millimeter.

11. The multi-layer encapsulation configuration of claim 9 , wherein the multi-layer encapsulation configuration is structured to surround at least part of the substrate such that a plane of a layer of the multi-layer encapsulation configuration intersects an edge of substrate in a substantially perpendicular manner.

12. The multi-layer encapsulation configuration of claim 9 , wherein the multi-layer encapsulation configuration is implemented as part of the electronic device that comprises the electrical contact and the substrate.

13. The multi-layer encapsulation configuration of claim 12 , wherein the electronic device is a solid-state device that comprises separately doped semiconductor materials in proximity of each other that form an electrical junction.

14. The multi-layer encapsulation configuration of claim 12 , wherein the electronic device further comprises a second electrical contact that is at least partially surrounded by the multi-layer encapsulation configuration, wherein the electrical contact and the second electrical contact are arranged in a series configuration.

15. A method for providing a multi-layer encapsulation configuration for use in an electronic device, comprising:

depositing a first layer of a first dielectric material on an electrical contact of the electronic device, wherein the electrical contact is positioned on a substrate of the electronic device, and wherein the first layer surrounds at least a top surface of the electrical contact and at least part of the substrate;

curing at least partially the first layer of the first dielectric material; and

depositing a second layer of a second dielectric material on the first layer of the first dielectric material, wherein molecular bonds formed at an interface between the first layer and the second layer are configured to prevent charge carriers from crossing between the first layer and the second layer.

16. The method of claim 15 , comprising:

converting the first dielectric material into a liquid form using a chemical solvent or a heating process prior to the depositing of the first layer.

17. The method of claim 15 , wherein the second dielectric material is different than the first dielectric material.

18. The method of claim 15 , comprising:

repeatedly depositing subsequent layers on the second layer, wherein a total number of layers in the multi-layer encapsulation configuration is determined based on an operating voltage of the electronic device.

19. The method of claim 15 , wherein the first dielectric material comprises a non-polymer material, and wherein the method further comprises:

applying an intermediate procedure to the first layer, wherein the intermediate procedure comprises a chemical treatment or depositing a layer of material that is dissimilar to the first dielectric material.

20. The method of claim 15 , wherein a thickness of the first layer or the second layer is smaller than 1 millimeter.