Method and apparatus for channel encoding/decoding in a communication or broadcasting system
A channel encoding method in a communication or broadcasting system is provided. The channel encoding method includes reading a first sequence corresponding to a parity check matrix, converting the first sequence to a second sequence by applying a certain rule to a block size corresponding to a parity check matrix and the first sequence, and encoding information bits based on the second sequence. The block size has at least two different integer values.
1. A method for encoding in a communication or broadcasting system supporting a low density parity check (LDPC) code, the method comprising:
identifying a size related to information bits to encode;
identifying a block size Z based on the size related to the information bits;
identifying, from among a plurality of sets of block sizes, a set of block sizes related to the block size Z;
identifying an exponent matrix including at least one integer value based on the set of block sizes;
identifying a parity check matrix including Z×Z zero matrix and Z×Z circular permutation matrix, based on the exponent matrix, and a modulo operation of the block size Z; and
encoding the information bits based on the parity check matrix,
wherein a first block size in the set of block sizes is multiple of two of a second block size in the set of block sizes.
2. The method of claim 1 , further comprising:
identifying a mother matrix consisting of 0 and 1; and
identifying a predetermined number based on the mother matrix,
wherein identifying the block size Z based on the size related to the information bits comprises identifying the block size Z based on the predetermined number and the size related to the information bits.
3. The method of claim 2 , wherein a multiplication of the predetermined number and the block size Z is larger than or equal to the size related to the information bits.
4. The method of claim 1 , wherein the set of block sizes is related to block sizes determined among {(A+i), 2(A+i), 2 2 (A+i), . . . , 2 S (A+i)}, where i=0, 1, 2, . . . , A−1, and A and S are positive integers.
5. The method of claim 4 , wherein A is 8 and S is 4.
6. The method of claim 1 , wherein the LDPC code is determined based on one of parity check matrices of at least two different sizes.
7. The method of claim 1 , wherein the parity check matrix is obtained based on a circular permutation matrix by applying a circularly shifting operation including one of the modulo operation or a flooring operation.
8. The method of claim 1 , wherein the LDPC code is determined based on one of two or more mother matrices.
9. The method of claim 1 , wherein at least one of the circular permutation matrices is a circularly shifted matrix of a Z×Z identity matrix.
10. An encoder in a communication or broadcasting system supporting a low density parity check (LDPC) code, the encoder comprising:
a transceiver; and
at least one processor coupled to the transceiver and configured to:
identify a size related to information bits to encode,
identify a block size Z based on the size related to the information bits,
identify, from among a plurality of sets of block sizes, a set of block sizes related to the block size Z,
identify an exponent matrix including at least one integer value based on the set of block sizes,
identify a parity check matrix including Z×Z zero matrix and Z×Z circular permutation matrix, based on the exponent matrix, and a modulo operation of the block size Z, and
encode the information bits based on the parity check matrix,
wherein a first block size in the set of block sizes is multiple of two of a second block size in the set of block sizes.
11. The encoder of claim 10 , wherein the at least one processor is further configured to:
identify a mother matrix consisting of 0 and 1,
identify a predetermined number based on the mother matrix, and
identify the block size Z based on the predetermined number and the size related to the information bits.
12. The encoder of claim 11 , wherein a multiplication of the predetermined number and the block size Z is larger than or equal to the size related to the information bits.
13. The encoder of claim 10 , wherein the set of block sizes is related to block sizes determined among {(A+i), 2(A+i), 2 2 (A+i), . . . , 2 S (A+i)}, where i=0, 1, 2, . . . , A−1, and A and S are positive integers.
14. The encoder of claim 13 , wherein A is 8 and S is 4.
15. The encoder of claim 10 , wherein the LDPC code is determined based on one of parity check matrices of at least two different sizes.
16. The encoder of claim 10 , wherein the parity check matrix is obtained based on a circular permutation matrix by applying a circularly shifting operation including one of the modulo operation or a flooring operation.
17. The encoder of claim 10 , wherein the LDPC code is determined based on one of two or more mother matrices.
18. The encoder of claim 10 , wherein at least one of the Z×Z circular permutation matrices is a circularly shifted matrix of a Z×Z identity matrix.
19. A method for decoding in a communication or broadcasting system supporting a low density parity check (LDPC) code, the method comprising:
receiving a signal from a transmitter; and
obtaining a bit sequence by decoding the signal,
wherein the decoding of the signal is performed based on a parity check matrix, wherein the parity check matrix including Z×Z zero matrix and Z×Z circular permutation matrix is based on an exponent matrix, and a modulo operation of block size Z,
wherein the exponent matrix including at least one integer value is based on a set of block sizes,
wherein the set of block sizes related to the block size Z is identified, from among a plurality of sets of block sizes,
wherein the block size Z is based on a size related to information bits, and
wherein a first block size in the set of block sizes is multiple of two of a second block size in the set of block sizes.
20. The method of claim 19 ,
wherein the block size Z is based on a predetermined number, and
wherein the predetermined number is based on a mother matrix consisting of 0 and 1.
21. The method of claim 20 , wherein a multiplication of the predetermined number and the block size Z is larger than or equal to the size related to information bits.
22. The method of claim 19 , wherein the set of block sizes is related to block sizes determined among {(A+i), 2(A+i), 2 2 (A+i), . . . , 2 S (A+i)}, where i=0, 1, 2, . . . , A−1, and A and S are positive integers.
23. The method of claim 22 , wherein A is 8 and S is 4.
24. The method of claim 19 , wherein the LDPC code is based on one of parity check matrices of at least two different sizes.
25. The method of claim 19 , wherein the parity check matrix is based on a circular permutation matrix by applying a circularly shifting operation including one of the modulo operation or a flooring operation.
26. The method of claim 19 , wherein the LDPC code is determined based on one of two or more mother matrices.
27. The method of claim 19 , wherein at least one of the Z×Z circular permutation matrices is a circularly shifted matrix of a Z×Z identity matrix.
28. A decoder in a communication or broadcasting system supporting a low density parity check (LDPC) code, the decoder comprising:
a transceiver; and
at least one processor coupled to the transceiver and configured to:
control the transceiver to receive a signal from a transmitter, and
obtain a bit sequence by decoding the signal,
wherein the decoding of the signal is performed based on a parity check matrix,
wherein the parity check matrix including Z×Z zero matrix and Z×Z circular permutation matrix is based on an exponent matrix, and a modulo operation of block size Z,
wherein the exponent matrix including at least one integer value is based on a set of block sizes,
wherein the set of block sizes related to the block size Z is identified, from among a plurality of sets of block sizes,
wherein the block size Z is based on a size related to information bits, and
wherein a first block size in the set of block sizes is multiple of two of a second block size in the set of block sizes.
29. The decoder of claim 28 ,
wherein the block size Z is based on a predetermined number, and
wherein the predetermined number is based on a mother matrix consisting of 0 and 1.
30. The decoder of claim 29 , wherein a multiplication of the predetermined number and the block size Z is larger than or equal to the size related to information bits.
31. The decoder of claim 28 , wherein the set of block sizes is related to block sizes determined among {(A+i), 2(A+i), 2 2 (A+i), . . . , 2 S (A+i)}, where i=0, 1, 2, . . . , A−1, and A and S are positive integers.
32. The decoder of claim 31 , wherein A is 8 and S is 4.
33. The decoder of claim 28 , wherein the LDPC code is based on one of parity check matrices of at least two different sizes.
34. The decoder of claim 28 , wherein the parity check matrix is based on a circular permutation matrix by applying a circularly shifting operation including one of the modulo operation or a flooring operation.
35. The decoder of claim 28 , wherein the LDPC code is determined based on one of two or more mother matrices.
36. The decoder of claim 28 , wherein at least one of the Z×Z circular permutation matrices is a circularly shifted matrix of a Z×Z identity matrix.