IP Library › Granted Patent US 12,271,359
Granted Patent B2
US 12,271,359 · App. 18/177,057 · Granted Apr 8, 2025

Device host operations in a storage system

Inventors: Hari Kannan (Sunnyvale, CA); Ying Gao (San Jose, CA); Boris Feigin (San Francisco, CA); Robert Lee (Pebble Beach, CA)
Assignee: PURE STORAGE, INC.
G06F16/2219G06F16/13G06F16/907
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Quick Facts
Patent No.
US 12,271,359
App. No.
18/177,057
Filed
Mar 1, 2023
Granted
Apr 8, 2025
Kind
B2
Art Unit
2168
USPC
707/737
Abstract

A storage system is provided. The storage system include a primary storage node that includes a primary processing device. The primary storage node is communicatively coupled to a secondary storage node. The secondary storage node includes a secondary processing device and a set of non-volatile memory modules. The primary processing device is to identify one or more storage operations to be performed on the set of non-volatile memory modules of the secondary storage node and transmit one or more instructions to the secondary storage node to perform the one or more storage operations, the one or more storage operations performed by the secondary processing device.

Claims (37)

1. A storage system, comprising:

a primary storage node comprising a primary processing device and one or more authorities that determine types of erasure coding applied to data stored in the storage system, the primary storage node communicatively coupled to a secondary storage node, the secondary storage node comprising a secondary processing device and a set of non-volatile memory modules; and

the primary processing device configured to:

identify one or more storage operations to be performed on the set of non-volatile memory modules of the secondary storage node; and

transmit one or more instructions to the secondary storage node to perform the one or more storage operations, the one or more storage operations performed by the secondary processing device and the one or more instructions indicating one or more addresses in the set of non-volatile memory modules where the one or more storage operations are to be performed.

2. The storage system of claim 1 , wherein the one or more storage operations are further performed by a set of device hosts of the secondary storage node and the set of device hosts manage the set of non-volatile memory modules of the secondary storage node.

3. The storage system of claim 1 , wherein the processing device is further to:

identify the secondary storage node based on the set of data or based on a set of blocks associated with the one or more storage operations.

4. The storage system of claim 1 , wherein the processing device is further to:

receive an indication from the secondary storage node that one or more storage operations should be performed.

5. The storage system of claim 1 , wherein to transmit the one or more instructions the primary processing device is further to:

determine a set of addresses associated with the data stored on the set of non-volatile memory modules of the secondary storage node; and

transmit the set of address to the secondary storage node.

6. The storage system of claim 1 , wherein the secondary processing device has less processing power than the primary processing device.

7. The storage system of claim 1 , wherein the secondary storage node lacks authorities.

8. The storage system of claim 1 , wherein the one or more operations comprise garbage collection operations for the set of non-volatile memory modules of the secondary storage node.

9. The storage system of claim 1 , wherein the one or more operations comprise reconstruction operations for data stored on the set of non-volatile memory modules of the secondary storage node and wherein the secondary processing device is further to:

write reconstructed data are one or more addresses received from the primary storage node.

10. The storage system of claim 1 , wherein the one or more operations comprise compression operations for the data stored on the set of non-volatile memory modules of the secondary storage node.

11. A method, comprising:

identifying, by a primary storage node comprising one or more authorities that determine types of erasure coding applied to data stored in a storage system, one or more storage operations to be performed on a set of non-volatile memory modules of a secondary storage node, the primary storage node communicatively coupled to the secondary storage node, the primary storage node comprising a primary processing device, and the secondary storage node comprising a secondary processing device; and

transmitting one or more instructions to the secondary storage node to perform the one or more storage operations, the one or more storage operations performed by the secondary processing device and the one or more instructions indicating one or more addresses in the set of non-volatile memory modules where the one or more storage operations are to be performed.

12. The method of claim 11 , wherein the one or more storage operations are further performed by a set of device hosts of the secondary storage node and the set of device hosts manage the set of non-volatile memory modules of the secondary storage node.

13. The method of claim 11 , further comprising:

identifying the secondary storage node based on the set of data or based on a set of blocks associated with the one or more storage operations.

14. The method of claim 11 , wherein the processing device is further to:

receiving an indication from the secondary storage node that one or more storage operations should be performed.

15. The method of claim 11 , wherein the processing device is further to:

determining a set of addresses associated with the data stored on the set of non-volatile memory modules of the secondary storage node; and

transmitting the set of address to the secondary storage node.

16. The method of claim 11 , wherein the secondary processing device has less processing power than the primary processing device.

17. The method of claim 11 , wherein the secondary storage node lacks authorities.

18. A non-transitory computer readable storage medium storing instructions, which when executed, cause a processing device of a primary storage node to:

identify, by the primary storage node comprising one or more authorities that determine types of erasure coding applied to data stored in a storage system, one or more storage operations to be performed on a set of non-volatile memory modules of a secondary storage node, the primary storage node communicatively coupled to the secondary storage node and the secondary storage node comprising a secondary processing device; and

transmit one or more instructions to the secondary storage node to perform the one or more storage operations, the one or more storage operations performed by the secondary processing device and the one or more instructions indicating one or more addresses in the set of non-volatile memory modules where the one or more storage operations are to be performed.

19. The storage system of claim 1 , wherein the primary storage node is a compute only storage node.

20. The storage system of claim 1 , wherein the primary storage node is located in a first enclosure and the secondary storage node is located in a second enclosure that is different than the first enclosure.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 24, 2023
From: KANNAN, HARI; GAO, YING; FEIGIN, BORIS; LEE, ROBERT
To: PURE STORAGE, INC.
Reel/Frame 063742/0783 →
Continuity (4)
Continuation In Part 18084339 · Dec 19, 2022
Continuation 16994332 · Aug 14, 2020
Continuation 14871833 · Sep 30, 2015
Related Publication 20230281177A1 · Sep 7, 2023
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