Power device with graded channel
A power device includes a silicon carbide substrate. A gate is provided on a first side of the silicon carbide substrate. A graded channel includes a first region having a first dopant concentration and a second region having a second dopant concentration, the second dopant concentration being greater than the first dopant concentration.
1 . An apparatus comprising:
a silicon carbide substrate;
a drift layer of n-type dopants on the silicon carbide substrate;
a gate disposed on the drift layer; and
a graded channel including:
a first region having a first dopant concentration,
a second region having a second dopant concentration, the second dopant concentration being greater than the first dopant concentration,
a source region of n-type dopants at a surface of the silicon carbide substrate, the first region being disposed between the source region and the drift layer, the second region being below the first region and in direct contact with the source region; and
a heavily doped pocket having a p-type conductivity, wherein the heavily doped pocket is in direct contact with the first region and the source region;
wherein the first region is in direct contact with the drift layer.
2 . The apparatus of claim 1 , wherein the second region is in direct contact with the drift layer.
3 . The apparatus of claim 2 , wherein the heavily doped pocket is in direct contact with the second region.
4 . The apparatus of claim 1 , wherein the n-type dopants are nitrogen ions.
5 . The apparatus of claim 1 , wherein the graded channel has a graded channel length of about 0.3 microns.
6 . The apparatus of claim 1 , wherein the source region of n-type dopants is has a dopant concentration of about 1×10 20 cm −3 .
7 . The apparatus of claim 1 , wherein the heavily doped pocket has a shape of a halo when viewed from a top view.
8 . The apparatus of claim 1 , wherein the second dopant concentration is at least 5 times greater than the first dopant concentration.
9 . The apparatus of claim 1 , wherein the second dopant concentration is at least 10 times greater than the first dopant concentration.
10 . An apparatus, comprising:
a silicon carbide substrate;
a drift layer of a first conductivity on the silicon carbide substrate;
a retrograde well having a lightly doped region of a second conductivity proximate to an upper surface of the retrograde well and a heavily doped region of the second conductivity provided below the lightly doped region;
a pocket of the second conductivity within the retrograde well, the pocket extending vertically through the lightly doped region;
a source region of nitrogen ions implanted at a surface of the silicon carbide substrate; and
a gate over the drift layer;
wherein the pocket of the second conductivity is in direct contact with the source region and the lightly doped region is in direct contact with the drift layer, and the pocket is disposed between the drift layer and the source region.
11 . The apparatus of claim 10 , wherein the pocket and the lightly doped region of the retrograde well define a graded channel, the graded channel comprising a first region having a first dopant concentration and a second region having a second dopant concentration, and the second dopant concentration being greater than the first dopant concentration.
12 . The apparatus of claim 10 , wherein a type of the first conductivity is different than a type of the second conductivity.
13 . A structure, comprising:
a silicon carbide substrate;
a silicon carbide layer of a first conductivity on the silicon carbide substrate;
a retrograde well of a second conductivity, the retrograde well having a lightly doped region below a surface of the silicon carbide layer and a first heavily doped region below the lightly doped region, the lightly doped region and the first heavily doped region in direct contact with the silicon carbide layer of the first conductivity;
a pocket of the second conductivity within the retrograde well, the pocket being a second heavily doped region;
an implanted region including n-type dopants and disposed at a top surface of the silicon carbide layer and in direct contact with the first heavily doped region; and
a gate over the surface of the silicon carbide layer;
wherein the pocket of the second conductivity is in direct contact with the implanted region of n-type dopants and the lightly doped region.
14 . The structure of claim 13 , wherein the implanted region including n-type dopants extends to a first depth below the top surface of the silicon carbide layer.
15 . The structure of claim 14 , further comprising additional implanted regions including n-type dopants at concentrations of about 1×10 17 cm −3 .
16 . The structure of claim 15 , wherein the additional implanted regions include an implanted region at a second depth below the first depth.
17 . The structure of claim 16 , wherein the additional implanted regions further include an implanted region at a third depth below the second depth.
18 . The structure of claim 17 , wherein the additional implanted regions further include an implanted region at a fourth depth below the third depth.
19 . The structure of claim 13 , wherein the structure is part of a silicon carbide transistor device or a junction field effect transistor (JFET) device.
20 . The structure of claim 13 , wherein the pocket is a p-type region.