IP Library Granted Patent US 12,635,555
Granted Patent B2
US 12,635,555 · App. 18/185,514 · Granted May 19, 2026

Full AG sinter discrete premium package

Inventors: XiaoYing Yuan (Suzhou, CN); Jie Chang (Suzhou, CN); Keunhyuk Lee (Suzhou, CN)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H01L23/3107H01L21/565H01L23/49513H01L23/4952H01L23/49551H01L23/49562H01L24/32H01L24/48H01L24/73H01L2224/32245H01L2224/48247H01L2224/73265H01L2924/13091
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Quick Facts
Patent No.
US 12,635,555
App. No.
18/185,514
Granted
May 19, 2026
Kind
B2
Abstract

A package includes a semiconductor die attached to a substrate and a mold body encapsulating the semiconductor die. A first portion of a lead is directly bonded to a contact pad on the semiconductor die with no intervening component between the first portion of the lead and the contact pad. A second portion of the lead extends outside the mold body to form an external terminal of the package. The lead is a dual gauge lead with the first portion of the lead having a thickness perpendicular to the contact pad that is smaller than a thickness of the second portion of the lead extending outside the mold body.

Claims (38)

1 . A package comprising:

a semiconductor die attached to a substrate;

a mold body encapsulating the semiconductor die;

a first portion of a lead directly bonded to a contact pad on the semiconductor die, the first portion being in a first plane and having a first thickness perpendicular to the contact pad;

a second portion of the lead extending outside the mold body to form an external terminal of the package, the second portion being in a second plane and having a second thickness, the second thickness being greater than the first thickness; and

a transition portion between the first portion and the second portion, the transition portion having a third thickness smaller than the second thickness.

2 . The package of claim 1 , wherein the first portion of the lead as a thickness that less than 0.5 mm.

3 . The package of claim 1 , wherein the contact pad is a source pad contact pad of the semiconductor die, the source pad contact pad having a width greater than 1.0 mm and a current carrying capacity greater than 200 amperes.

4 . The package of claim 1 , wherein the semiconductor die attached to the substrate by a sintering process.

5 . The package of claim 1 , wherein the first portion of the lead is directly attached to the contact pad by a sintering process.

6 . The package of claim 1 , wherein the semiconductor die is a silicon carbide (SiC) power transistor.

7 . The package of claim 1 , wherein the third thickness and the first thickness are a same thickness.

8 . A package comprising:

a semiconductor die attached to a substrate;

a mold body encapsulating the semiconductor die;

a first portion of a first lead directly attached to a source contact pad on the semiconductor die, the first portion being in a first plane and having a first thickness perpendicular to the source contact pad;

a second portion of the first lead extending outside the mold body to form an external source terminal of the package, the second portion being in a second plane and having a second thickness, the second thickness being greater than the first thickness;

a transition portion of the first lead, the transition portion connecting the first portion and the second portion, the transition portion having a third thickness smaller than the second thickness; and

a first portion of a second lead directly attached to a gate contact pad on the semiconductor die, a second portion of the second lead extending outside the mold body to form an external gate terminal of the package, the first portion of the second lead being directly attached to the gate contact pad with no intervening component between the first portion of the first lead and the source contact pad.

9 . The package of claim 8 , wherein the first portion of the first lead is directly attached to the source contact pad by a sintering process.

10 . The package of claim 8 , wherein the first portion of the first lead as a thickness that is less than 0.5 mm.

11 . The package of claim 8 , wherein the source contact pad has a width greater than 1.0 mm and a current carrying capacity greater than 200 amperes.

12 . The package of claim 8 , wherein the semiconductor die is attached to the substrate by a sintering process.

13 . The package of claim 8 , wherein the semiconductor die is a silicon carbide (SiC) power transistor.

14 . The package of claim 8 , wherein the third thickness and the first thickness are a same thickness.

15 . A method comprising:

disposing a semiconductor device die on a substrate;

attaching a second portion of a lead directly to a device contact pad on the semiconductor device die without an intervening component between the lead and the device contact pad, the lead being a dual gauge lead with the second portion of the lead being disposed in a first plane and having a first thickness smaller than a second thickness of a first portion of the lead disposed in a second plane different from the first plane, the lead including a transition portion connecting the first portion and the second portion, the transition portion having a third thickness smaller than the second thickness; and

encapsulating the semiconductor device die in a mold body with the first portion of the lead extending outside the mold body.

16 . The method of claim 15 , wherein disposing the semiconductor device die on the substrate includes bonding the semiconductor device die to a die attach pad (DAP) on the substrate using a sintering process to bond the semiconductor device die to the DAP.

17 . The method of claim 15 , wherein attaching the second portion of the lead to the device contact pad on the semiconductor device die includes using a sintering process to bond the second portion of the lead to the device contact pad.

18 . The method of claim 15 , wherein the lead is a first lead, the device contact pad is a first device contact pad, and disposing the semiconductor device die on the substrate includes attaching a direct lead attach (DLA) clip to the semiconductor device die, the DLA clip including a plurality of leads with first portions of the plurality of leads including the first portion of the first lead extending between a top and a bottom of a collar and second portions of the plurality of leads including the second portion of the first lead extending above the top of the collar.

19 . The method of claim 18 , wherein attaching the second portion of the lead to the device contact pad on the semiconductor device die includes: attaching the second portion of the first lead of the plurality of leads to the first device contact pad, attaching a second portion of a second lead of the plurality of leads to a second device contact pad, and attaching a second portion of a third lead of the plurality of leads to a third device contact pad on the semiconductor device die.

20 . The method of claim 19 , wherein attaching the second portion of a second lead of the plurality of leads to the second device contact pad and attaching the second portion of the third lead of the plurality of leads to the third device contact pad include using a sintering process.

21 . The method of claim 20 , wherein the first device contact pad is a gate contact pad, the second device contact pad is a sense contact pad, and the third device contact pad is a source contact pad of the semiconductor device die.

22 . The method of claim 18 , wherein encapsulating the semiconductor device die in the mold body with the second portion of the lead extending outside the mold body includes encapsulating the semiconductor device die in the mold body with the collar of the DLA clip remaining outside the mold body.

23 . The method of claim 22 further comprising, removing the collar from the DLA clip to individually separate the first portions of leads attached to the collar.

24 . The method of claim 23 further comprising, shaping the first portions of the plurality of leads to form external terminals of a device package.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 064502, FRAME 0293 Recorded Nov 14, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 065566/0488 →
SECURITY INTEREST Recorded May 9, 2023
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 065402/0293 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 17, 2023
From: YUAN, XIAOYING; CHANG, JIE; LEE, KEUNHYUK
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 063015/0959 →
Continuity (1)
Related Publication 20240312855A1 · Sep 19, 2024
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