Granted Patent B2

US 12,253,922 · App. 18/194,665 · Granted Mar 18, 2025

Inventors: John D. Davis (San Francisco, CA); John Hayes (Mountain View, CA); Hari Kannan (Sunnyvale, CA); Nenad Miladinovic (Los Gatos, CA); Zhangxi Tan (Mountain View, CA)

Assignee: PURE STORAGE, INC.

G06F11/2069G06F3/0619G06F3/064G06F3/067G06F3/0685G06F3/0689G06F11/1068G06F11/1072G06F11/1076G06F11/1612G06F2201/805G06F2201/82

Abstract

Claims (35)

1. A method, comprising:

detecting an error in accessing data from solid-state memory of a storage system; and

determining that a value associated with a characteristic of a portion of the solid-state memory storing the data exceeds a threshold value associated with the portion of the solid-state memory storing the data; and

identifying the portion of the solid-state memory for a data rebuild, wherein the solid-state memory of the storage system comprises flash memory having uniform and non-uniform capacity within a node having the portion of the solid-state memory storing the data.

2. The method of claim 1 , further comprising:

retrying reading the data with differing levels of reference voltage applied to the portion of the solid-state memory storing the data.

3. The method of claim 1 , further comprising:

retrying reading the data with error correction internal to a die in the solid-state memory.

4. The method of claim 1 , wherein the characteristic is a lifetime characteristic associated with the portion of the solid-state memory storing the data.

5. The method of claim 1 , wherein an erasure code associated with the data rebuild is different than an erasure code associated with the data at the portion of the solid-state memory.

6. The method of claim 1 , comprising:

rebuilding the data at the portion of the solid-state memory into one of a plurality of storage nodes, the rebuilt data utilizing an erasure coding differing from an erasure coding applied to data within the one of the plurality of storage nodes.

7. The method of claim 1 wherein the threshold value is associated with a number of program/erase cycles for the portion of the solid-state memory.

8. A non-transitory machine-readable medium having executable instructions to cause one or more processing units to perform a method for error recovery in a storage system, comprising:

detecting an error in accessing data from solid-state memory of a storage system; and

determining that a value associated with a characteristic of a portion of the solid-state memory storing the data exceeds a threshold value associated with the portion of the solid-state memory storing the data; and

identifying the portion of the solid-state memory for a data rebuild, wherein the solid-state memory of the storage system comprises flash memory having uniform and non-uniform capacity within a node having the portion of the solid-state memory storing the data.

9. The non-transitory machine-readable medium of claim 8 , further comprising:

retrying reading the data with differing levels of reference voltage to the solid-state memory.

10. The non-transitory machine-readable medium of claim 8 , wherein the characteristic is a lifetime characteristic associated with the portion of the solid-state memory storing the data.

11. The non-transitory machine-readable medium of claim 8 , further comprising:

rebuilding the data at the portion of the solid-state memory into one of a plurality of storage nodes, the rebuilt data utilizing an erasure coding differing from an erasure coding applied to data within the one of the plurality of storage nodes.

12. The non-transitory machine-readable medium of claim 8 , wherein the threshold value is associated with a number of program/erase cycles for the portion of the solid-state memory.

13. A storage device, comprising:

solid state memory;

a processor associated with the solid-state memory, the processor configured to:

detect an error in accessing data from solid-state memory of a storage system; and

determine that a value associated with a characteristic of a portion of the solid-state memory storing the data exceeds a threshold value associated with the portion of the solid-state memory storing the data; and

identify the portion of the solid-state memory for a data rebuild, wherein the solid-state memory of the storage system comprises flash memory having uniform and non-uniform capacity within a node having the portion of the solid-state memory storing the data.

14. The storage device of claim 13 , wherein the processor is configured to:

retry reading the data with differing levels of reference voltage to the solid-state memory.

15. The storage device of claim 13 , wherein the characteristic is a lifetime characteristic associated with the portion of the solid-state memory storing the data.

16. The storage device of claim 13 , wherein the processor is configured to:

rebuild the data at the portion of the solid-state memory into one of a plurality of storage nodes, the rebuilt data utilizing an erasure coding differing from an erasure coding applied to data within the one of the plurality of storage nodes.

17. The storage device of claim 13 , wherein the threshold value is associated with a number of program/erase cycles for the portion of the solid-state memory.

Assignments (1)

Continuity (5)

References Cited (400)