IP Library Granted Patent US 12,283,238
Granted Patent B2
US 12,283,238 · App. 18/197,934 · Granted Apr 22, 2025

Display screen frequency conversion method, DDIC chip, and terminal

Inventors: Yankai Gao (Guangdong, CN); Lei Wang (Guangdong, CN)
Assignee: GUANGDONG OPPO MOBILE TELECOMMUNICATIONS CORP., LTD.
G09G3/3225G09G3/2096G09G2320/06G09G2340/0435
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Quick Facts
Patent No.
US 12,283,238
App. No.
18/197,934
Granted
Apr 22, 2025
Kind
B2
Abstract

A display screen frequency conversion method, a DDIC chip, and a terminal are provided. The method includes: outputting a Tearing Effect (TE) signal to an Application Processor (AP) at a first base frame rate, and performing an image scanning and a frame compensating at the first base frame rate; receiving a frequency reducing instruction issued by the AP, wherein the frequency reducing instruction is configured to instruct to reduce a base frame rate of the display screen; and outputting the TE signal to the AP at a second base frame rate based on the frequency reducing instruction and continually performing the image scanning and the frame compensating at the first base frame rate, wherein the second base frame rate is less than the first base frame rate.

Claims (46)

1. A terminal comprising an Application Processor (AP), a display screen, and a Display Driver Integrated Circuit (DDIC) chip, the AP and the DDIC chip being connected through a Mobile Industry Processor Interface (MIPI), and the DDIC chip being configured to execute:

outputting a Tearing Effect (TE) signal to an Application Processor (AP) at a first base frame rate, and performing an image scanning and a frame compensating at the first base frame rate;

receiving a frequency reducing instruction issued by the AP, wherein the frequency reducing instruction is configured to instruct to reduce a base frame rate of the display screen; and

outputting the TE signal to the AP at a second base frame rate based on the frequency reducing instruction to enable the AP to send image data to the DDIC at the second base frame rate and continually performing the image scanning and the frame compensating at the first base frame rate to enable the display screen to refresh images at the first base frame rate after outputting the TE signal to the AP at the second base frame rate based on the frequency reducing instruction, wherein the second base frame rate is less than the first base frame rate;

wherein the continually performing the image scanning and the frame compensating at the first base frame rate comprises: continually performing the image scanning and the frame compensating based on a DDIC timing and parameters of the display screen corresponding to the first base frame rate.

2. A Display Driver Integrated Circuit (DDIC) chip applied to a display screen, and the DDIC chip being configured to:

output a Tearing Effect (TE) signal to an Application Processor (AP) at a first base frame rate, and perform an image scanning and a frame compensating at the first base frame rate;

receive a frequency reducing instruction issued by the AP, wherein the frequency reducing instruction is configured to instruct to reduce a base frame rate of the display screen; and

output the TE signal to the AP at a second base frame rate based on the frequency reducing instruction to enable the AP to send image data to the DDIC at the second base frame rate and continually perform the image scanning and the frame compensating at the first base frame rate to enable the display screen to refresh images at the first base frame rate after outputting the TE signal to the AP at the second base frame rate based on the frequency reducing instruction, wherein the second base frame rate is less than the first base frame rate;

wherein the DDIC chip is configured to continually perform the image scanning and the frame compensating based on a DDIC timing and parameters of the display screen corresponding to the first base frame rate.

3. The DDIC chip as claimed in claim 2 , wherein the DDIC chip is configured to:

determine the second base frame rate based on the frequency re ducing ratio instructed by the frequency reducing instruction and the first base frame rate, wherein the frequency reducing ratio is 1/N, the second base frame rate is 1/N of the first base frame rate, and N is an integer greater than or equal to 2; and

output the TE signal to the AP at the second base frame rate.

4. The DDIC chip as claimed in claim 3 , wherein the DDIC chip is further configured to:

determine a signal outputting interval based on the second base frame rate; and

output the TE signal to the AP based on the signal outputting interval, wherein a frequency of the TE signal received by the AP is the second base frame rate.

5. The DDIC chip as claimed in claim 3 , wherein the DDIC chip is further configured to:

output the TE signal with a continuous high level to the AP at the second base frame rate, wherein a high-level duration of the TE signal with the continuous high level is a duration of N continuous TE signals under the first base frame rate.

6. The DDIC chip as claimed in claim 3 , wherein the DDIC chip is configured to:

output the TE signal to the AP at the second base frame rate starting from a moment of the image scanning.

7. The DDIC chip as claimed in claim 2 , wherein the DDIC chip is further configured to:

receive a frequency raising instruction issued by the AP, wherein the frequency raising instruction is configured to instruct to raise the base frame rate of the display screen; and

output the TE signal to the AP at a third base frame rate based on the frequency raising instruction and continually perform the image scanning and the frame compensating at the first base frame rate, wherein the third base frame rate is greater than the second base frame rate and less than or equal to the first base frame rate.

8. The DDIC chip as claimed in claim 2 , wherein the DDIC chip is applied to an Organic Light Emitting Diode (OLED) display screen.

9. The DDIC chip as claimed in claim 2 , wherein the DDIC chip is a DDIC chip of the display screen in a mobile terminal.

10. A display screen frequency conversion method performed by a Display Driver Integrated Circuit (DDIC) of a display screen, the method comprising:

outputting a Tearing Effect (TE) signal to an Application Processor (AP) at a first base frame rate, and performing an image scanning and a frame compensating at the first base frame rate;

receiving a frequency reducing instruction issued by the AP, wherein the frequency reducing instruction is configured to instruct to reduce a base frame rate of the display screen; and

outputting the TE signal to the AP at a second base frame rate based on the frequency reducing instruction to enable the AP to send image data to the DDIC at the second base frame rate and continually performing the image scanning and the frame compensating at the first base frame rate to enable the display screen to refresh images at the first base frame rate after outputting the TE signal to the AP at the second base frame rate based on the frequency reducing instruction, wherein the second base frame rate is less than the first base frame rate;

wherein the continually performing the image scanning and the frame compensating at the first base frame rate comprises: continually performing the image scanning and the frame compensating based on a DDIC timing and parameters of the display screen corresponding to the first base frame rate.

11. The method as claimed in claim 10 , wherein the outputting the TE signal to the AP at a second base frame rate based on the frequency reducing instruction comprises:

determining the second base frame rate based on the frequency reducing ratio instructed by the frequency reducing instruction and the first base frame rate, wherein the frequency reducing ratio is 1/N, the second base frame rate is 1/N of the first base frame rate, and N is an integer greater than or equal to 2; and

outputting the TE signal to the AP at the second base frame rate.

12. The method as claimed in claim 11 , wherein the outputting the TE signal to the AP at the second base frame rate comprises:

determining a signal outputting interval based on the second base frame rate; and

outputting the TE signal to the AP based on the signal outputting interval, wherein a frequency of the TE signal received by the AP is the second base frame rate.

13. The method as claimed in claim 12 , wherein the signal outputting interval is N−1 frames.

14. The method as claimed in claim 11 , wherein the outputting the TE signal to the AP at the second base frame rate comprises:

outputting the TE signal with a continuous high level to the AP at the second base frame rate, wherein a high-level duration of the TE signal with the continuous high levelis a duration of N continuous TE signals under the first base frame rate.

15. The method as claimed in claim 11 , wherein the outputting the TE signal to the AP at the second base frame rate comprises:

outputting the TE signal to the AP at the second base frame rate starting from a moment of the image scanning.

16. The method as claimed in claim 10 , wherein after the outputting the TE signal to the AP at a second base frame rate based on the frequency reducing instruction and performing the image scanning and the frame compensating at the first base frame rate, the method further comprises:

receiving a frequency raising instruction issued by the AP, wherein the frequency raising instruction is configured to instruct to raise the base frame rate of the display screen; and

outputting the TE signal to the AP at a third base frame rate based on the frequency raising instruction and continually performing the image scanning and the frame compensating at the first base frame rate, wherein the third base frame rate is greater than the second base frame rate and less than or equal to the first base frame rate.

17. The method as claimed in claim 10 , wherein the display screen is an Organic Light Emitting Diode (OLED) display screen.

18. The method as claimed in claim 10 , wherein the method is performed by the DDIC chip of the display screen in a mobile terminal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 1, 2024
From: GAO, YANKAI; WANG, LEI
To: GUANGDONG OPPO MOBILE TELECOMMUNICATIONS CORP. LTD.
Reel/Frame 067287/0688 →
Priority Claims (1)
CN 202011287117.4 · Nov 17, 2020 · national
Continuity (2)
Continuation PCTCN2021123579 · Oct 13, 2021
Related Publication 20230282162A1 · Sep 7, 2023
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