IP Library Granted Patent US 7,545,368
Granted Patent B2
US 7,545,368 · App. 11/049,635 · Granted Jun 9, 2009

Display controller, display system, and display control method

Assignee: Seiko Epson Corporation
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,545,368
App. No.
11/049,635
Granted
Jun 9, 2009
Kind
B2
Abstract

A display controller includes a frame memory, an interrupt output cycle setting register, and an interrupt signal generation section. The frame memory stores the display data for at least one vertical scan period, the display data being supplied from a host. An output cycle of an interrupt signal to be output to the host is set in units of one vertical scan period in the interrupt output cycle setting register. The interrupt signal generation section outputs an interrupt signal having pulses in the output cycle set in the interrupt output cycle setting register to the host as the interrupt signal. The display controller stores the display data supplied from the host corresponding to the interrupt signal in the frame memory, reads the display data from the frame memory in a predetermined read cycle, and supplies the display data to the data driver.

Claims (74)

1. A display controller that supplies display data to a data driver driving a plurality of scan lines of a display panel based on the display data, the display controller comprising:

a frame memory that stores the display data for at least one vertical scan period, the display data being supplied from a host;

an interrupt output cycle setting register, an output cycle of an interrupt signal to be output to the host being set in units of one vertical scan period in the interrupt output cycle setting register;

an interrupt output setting register that selects whether to pulse-output or level-output the interrupt signal; and

an interrupt signal generation section generating a first interrupt signal having pulses in the output cycle set in the interrupt output cycle setting register,

the interrupt signal generation section generating a second interrupt signal which is set active when the output cycle set in the interrupt output cycle setting register has elapsed from a preceding active change timing and is set to inactive by the host, and

the interrupt signal generation section outputting the first or second interrupt signal to the host as the interrupt signal based on a value set in the interrupt output setting register,

the display controller storing the display data supplied from the host corresponding to the interrupt signal in the frame memory,

the display controller reading the display data from the frame memory in a predetermined read cycle, and

the display controller supplying the display data to the data driver.

2. The display controller as defined in claim 1 ,

the interrupt signal generation section generating the second interrupt signal, the second interrupt signal being set to active when the output cycle set in the interrupt output cycle setting register has elapsed from an inactive setting timing of the host.

3. The display controller as defined in claim 1 , comprising:

an interrupt output enable setting register, enable setting of output of the interrupt signal being set to the interrupt output enable setting register,

the interrupt signal generation section outputting the interrupt signal to the host when the interrupt signal is enabled in the interrupt output enable setting register, and

the interrupt signal generation section masking the output of the interrupt signal when the interrupt signal is disabled in the interrupt output enable setting register.

4. The display controller as defined in claim 1 ,

the read cycle being a period longer than the one vertical scan period.

5. A display system, comprising:

a display panel that includes:

a plurality of scan lines;

a plurality of data lines; and

a plurality of electroluminescent elements, each of the electroluminescent elements being specified by one of the plurality of scan lines and one of the plurality of data lines;

a scan driver that scans the plurality of scan lines;

a data driver that drives the plurality of data lines; and

the display controller as defined in claim 1 ,

the display controller outputting the interrupt signal to the host,

the display controller storing the display data supplied from the host corresponding to the interrupt signal in the frame memory,

the display controller reading the display data from the frame memory in a predetermined read cycle, and

the display controller outputting the display data to the data driver.

6. A display system, comprising:

a display panel that includes:

a plurality of scan lines;

a plurality of data lines; and

a plurality of electroluminescent elements, each of the electroluminescent elements being specified by one of the plurality of scan lines and one of the plurality of data lines;

a scan driver that scans the plurality of scan lines;

a data driver that drives the plurality of data lines; and

the display controller as defined in claim 2 ,

the display controller outputting the interrupt signal to the host,

the display controller storing the display data supplied from the host corresponding to the interrupt signal in the frame memory,

the display controller reading the display data from the frame memory in a predetermined read cycle, and

the display controller outputting the display data to the data driver.

7. A display system, comprising:

a display panel that includes:

a plurality of scan lines;

a plurality of data lines; and

a plurality of electroluminescent elements, each of the electroluminescent elements being specified by one of the plurality of scan lines and one of the plurality of data lines;

a scan driver that scans the plurality of scan lines;

a data driver that drives the plurality of data lines; and

the display controller as defined in claim 3 ,

the display controller outputting the interrupt signal to the host,

the display controller storing the display data supplied from the host corresponding to the interrupt signal in the frame memory,

the display controller reading the display data from the frame memory in a predetermined read cycle, and

the display controller outputting the display data to the data driver.

8. A display system, comprising:

a display panel that includes:

a plurality of scan lines;

a plurality of data lines; and

a plurality of electroluminescent elements, each of the electroluminescent elements being specified by one of the plurality of scan lines and one of the plurality of data lines;

a scan driver that scans the plurality of scan lines;

a data driver that drives the plurality of data lines; and

the display controller as defined in claim 4 ,

the display controller outputting the interrupt signal to the host,

the display controller storing the display data supplied from the host corresponding to the interrupt signal in the frame memory,

the display controller reading the display data from the frame memory in a predetermined read cycle, and

the display controller outputting the display data to the data driver.

9. A display control method that supplies display data to a data driver driving a display panel including a plurality of scan lines and a plurality of data lines based on the display data, the display control method comprising:

generating a first interrupt signal having pulses in an output cycle set in an interrupt output cycle setting register,

generating a second interrupt signal which is set to active when the output cycle set in the interrupt output cycle setting register has elapsed from a preceding active change timing and is set to inactive by a host,

outputting either the first interrupt signal or the second interrupt signal as an interrupt signal to the host in the output cycle in units of one vertical scan period;

receiving the display data supplied from the host corresponding to the interrupt signal, and storing the display data for at least one vertical scan period in a frame memory; and

reading the display data from the frame memory in a predetermined read cycle, and supplying the display data to the data driver.

10. The display control method as defined in claim 9 ,

the read cycle being a period longer than the one vertical scan period.

Assignments (2)
PLEASE REVISE THE DOCKET NUMBER ON THE ASSIGNMENT RECORDED AT REEL/FRAME 016115/0661 ON APRIL 20, 2005. (ASSIGNMENT OF ASSIGNOR'S INTEREST) Recorded Jul 18, 2005
From: TOMOHARA, KIYOHIDE
To: SEIKO EPSON CORPORATION
Reel/Frame 016545/0005 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 20, 2005
From: TOMOHARA, KIYOHIDE
To: SEIKO EPSON CORPORATION
Reel/Frame 016115/0661 →
Priority Claims (1)
JP 2004-026871 · Feb 3, 2004 · national
Continuity (1)
Related Publication 20050177654A1 · Aug 11, 2005