Semiconductor device
A semiconductor device includes a bottom wafer, a top wafer bonded to the bottom wafer, a first dielectric layer, a second dielectric layer, a deep via conductor structure, and a connection pad. The top wafer includes a first interconnection structure. The first dielectric layer is disposed on the top wafer. The second dielectric layer is disposed on the first dielectric layer. The deep via conductor structure penetrates through the second dielectric layer and the first dielectric layer and is connected with the first interconnection structure. The connection pad is disposed on the second dielectric layer and the deep via conductor structure. A first portion of the second dielectric layer is sandwiched between the connection pad and the first dielectric layer. A second portion of the second dielectric layer is connected with the first portion, and a thickness of the second portion is less than a thickness of the first portion.
1 . A semiconductor device, comprising:
a bottom wafer;
a top wafer bonded to the bottom wafer, wherein the top wafer comprises a first interconnection structure;
a first dielectric layer disposed on the top wafer;
a second dielectric layer disposed on the first dielectric layer;
a deep via conductor structure penetrating through the second dielectric layer and the first dielectric layer, wherein the deep via conductor structure is connected with the first interconnection structure; and
a connection pad disposed on the second dielectric layer and the deep via conductor structure, wherein the second dielectric layer comprises:
a first portion sandwiched between the connection pad and the first dielectric layer; and
a second portion connected with the first portion, wherein a thickness of the second portion is less than a thickness of the first portion, the connection pad overlaps the first portion of the second dielectric layer in a vertical direction, and the second portion of the second dielectric layer is not covered by the connection pad in the vertical direction.
2 . The semiconductor device according to claim 1 , wherein a material composition of the second dielectric layer is different from a material composition of the first dielectric layer.
3 . The semiconductor device according to claim 1 , wherein the first dielectric layer is thicker than the second dielectric layer.
4 . The semiconductor device according to claim 1 , further comprising:
a third dielectric layer covering the connection pad and the second dielectric layer, wherein a sum of the thickness of the first portion of the second dielectric layer and a thickness of the third dielectric layer disposed on the connection pad is greater than a sum of the thickness of the second portion of the second dielectric layer and a thickness of the third dielectric layer disposed on the second dielectric layer.
5 . The semiconductor device according to claim 4 , wherein a material composition of the third dielectric layer is different from a material composition of the second dielectric layer.
6 . The semiconductor device according to claim 4 , wherein a material composition of the third dielectric layer is identical to a material composition of the second dielectric layer.
7 . The semiconductor device according to claim 4 , further comprising:
an opening penetrating through the third dielectric layer on the connection pad and exposing a part of the connection pad.
8 . The semiconductor device according to claim 1 , wherein the deep via conductor structure is directly connected with a portion of the first interconnection structure.
9 . The semiconductor device according to claim 1 , wherein the bottom wafer comprises a second interconnection structure, and the connection pad is electrically connected with the second interconnection structure via the deep via conductor structure and the first interconnection structure of the top wafer.
10 . A semiconductor device, comprising:
a bottom wafer;
a top wafer bonded to the bottom wafer, wherein the top wafer comprises a first interconnection structure and a buried insulation layer;
a first dielectric layer disposed on the top wafer, wherein the buried insulation layer is disposed between the first interconnection structure and the first dielectric layer; and
a deep via conductor structure penetrating through the first dielectric layer and the buried insulation layer, wherein the deep via conductor structure is connected with the first interconnection structure, and the deep via conductor structure comprises:
a first portion; and
a second portion connected with the first portion, wherein the first portion is sandwiched between the second portion and the first interconnection structure, and a sidewall of the deep via conductor structure comprises a turning section located between a sidewall of the first portion and a sidewall of the second portion,
wherein a material composition of the first dielectric layer is different from a material composition of the buried insulation layer, and the first dielectric layer is thicker than the buried insulation layer.
11 . The semiconductor device according to claim 10 , wherein the turning section of the sidewall of the deep via conductor structure is located in the first dielectric layer.
12 . The semiconductor device according to claim 10 , wherein the turning section of the sidewall of the deep via conductor structure is directly connected with the sidewall of the first portion and the sidewall of the second portion.
13 . The semiconductor device according to claim 10 , wherein a width of the first portion is less than a width of the second portion.
14 . The semiconductor device according to claim 10 , further comprising:
a connection pad disposed on the deep via conductor structure; and
a second dielectric layer disposed between the first dielectric layer and the connection pad, wherein the deep via conductor structure further penetrates through the second dielectric layer.
15 . The semiconductor device according to claim 14 , wherein a material composition of the first dielectric layer is different from a material composition of the second dielectric layer, and the first dielectric layer is thicker than the second dielectric layer.
16 . The semiconductor device according to claim 14 , wherein the bottom wafer comprises a second interconnection structure, and the connection pad is electrically connected with the second interconnection structure via the deep via conductor structure and the first interconnection structure of the top wafer.
17 . The semiconductor device according to claim 10 , wherein the deep via conductor structure is directly connected with a portion of the first interconnection structure.