IP Library › Granted Patent US 12,733,094
Granted Patent B2
US 12,733,094 · App. 18/238,144 · Granted Sep 8, 2026

Printed circuit board

Inventors: Seung Min Lee (Suwon-si, KR); Francis Saynes (Suwon-si, KR); Keun Woo Kwon (Suwon-si, KR)
Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
H05K1/113H05K3/3452H05K2201/0939H05K2201/094H05K2201/099
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,733,094
App. No.
18/238,144
Granted
Sep 8, 2026
Kind
B2
Abstract

A printed circuit board includes a first insulating layer, a plurality of first and second pads disposed on the first insulating layer, and a solder resist layer disposed on the first insulating layer, the solder resist layer having a plurality of first and second openings respectively exposing at least portions of the plurality of first and second pads. The first pad has a closed region having a side surface covered by the solder resist layer, and an open region having a side surface exposed by the first opening. The second pad has only a closed region having a side surface covered by the solder resist layer.

Claims (36)

1 . A printed circuit board comprising:

a first insulating layer;

a plurality of first and second pads disposed on the first insulating layer; and

a solder resist layer disposed on the first insulating layer, the solder resist layer having a plurality of first and second openings respectively exposing at least portions of the plurality of first and second pads;

wherein the first pad has a closed region having a side surface covered by the solder resist layer, and an open region having a side surface exposed by the first opening,

wherein the second pad has only a closed region having a side surface covered by the solder resist layer, and

wherein a distance between the closed region of the first pad and the second pad adjacent to the closed region of the first pad is shorter than a distance between open regions of the first pads adjacent to each other.

2 . The printed circuit board of claim 1 , wherein a distance between closed regions of the first pads adjacent to each other is shorter than a distance between open regions of the first pads adjacent to each other.

3 . The printed circuit board of claim 1 , wherein a distance between the closed region of the first pad and the second pad adjacent to the closed region of the first pad is substantially the same as a distance between closed regions of the first pads adjacent to each other.

4 . The printed circuit board of claim 1 , wherein an area of the first pad is smaller than an area of the second pad.

5 . The printed circuit board of claim 1 , wherein the solder resist layer is disposed between open regions of the first pads adjacent to each other.

6 . The printed circuit board of claim 1 , further comprising: a surface treatment layer disposed on the first and second pads.

7 . The printed circuit board of claim 1 , wherein the first and second pads have one of a circular shape, an elliptical shape, a polygonal shape, and a polygonal shape with rounded corner portions.

8 . The printed circuit board of claim 7 , wherein the first and second pads have a quadrangular shape with rounded corner portions.

9 . The printed circuit board of claim 8 , wherein the first and second pads are arranged to be inclined on a plane.

10 . The printed circuit board of claim 1 , further comprising:

a circuit pattern disposed on a lower surface of the first insulating layer; and

a via passing through the first insulating layer and connecting the first and second pads and the circuit pattern to each other.

11 . A printed circuit board comprising:

an insulator having first openings and second openings; and

first pads and second pads covered by the insulator,

wherein each of the first openings exposes at least a portion of an upper surface of each of the first pads and at least a portion of a side surface of each of the first pads, and does not expose another portion of the side surface of each of the first pads,

wherein each of the second openings exposes at least a portion of an upper surface of each of the second pads, and does not expose a side surface of each of the second pads, and

wherein a shortest distance, measured in plan view, between a covered side-surface portion of a first pad and a side surface of an adjacent second pad is less than a shortest distance, measured in plan view, between exposed side-surface portions of two adjacent first pads.

12 . The printed circuit board of claim 11 , wherein a corner portion of the upper surface of the second pad and the side surface of the second pad are covered by the insulator.

13 . The printed circuit board of claim 11 , wherein an area of a surface of the second opening is smaller than an area of the upper surface of the second pad.

14 . The printed circuit board of claim 11 , wherein at least a portion of a corner portion of the upper surface of the first pad is exposed by the first opening.

15 . The printed circuit board of claim 14 , wherein the insulator includes an insulating layer and a solder resist layer disposed on the insulating layer, and the first and second openings are disposed in the solder resist layer.

16 . A printed circuit board comprising:

an insulating layer;

a first pad and a second pad disposed on the insulating layer; and

a solder resist layer disposed on the insulating layer, the solder resist layer having a first opening exposing not entire of an upper surface of the first pad and a second opening exposing only a portion of an upper surface of the second pad,

wherein among the first opening and the second opening, only the first opening exposes a portion of the insulating layer,

wherein the solder resist layer covers only portions of edges of the upper surface of the first pad, and covers all edges of the upper surface of the second pad, and

wherein an edge of the upper surface of the first pad and an edge of the upper surface of the second pad are inclined with respect to an arrangement direction of the first pad and the second pad on the insulating layer.

17 . The printed circuit board of claim 16 , wherein an area of the first pad is smaller than an area of the second pad.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 25, 2023
From: LEE, SEUNG MIN; SAYNES, FRANCIS; KWON, KEUN WOO
To: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Reel/Frame 064792/0592 →
Priority Claims (1)
KR 10-2022-0124116 · Sep 29, 2022 · national
Continuity (1)
Related Publication 20240114620A1 · Apr 4, 2024
References Cited (12)
US 6228466B1 · Tsukada · 2001 [cited by examiner]
US 7271484B2 · Reiss · 2007 [cited by examiner]
US 9814135B2 · Nakamura · 2017 [cited by examiner]
US 10582615B2 · Noguchi · 2020 [cited by examiner]
US 20140247573A1 · Kim et al. · 2014 [cited by applicant]
US 20150068791A1 · Nakamura et al. · 2015 [cited by applicant]
US 20170303396A1 · Nishioka · 2017 [cited by examiner]
US 20220192018A1 · Sakai · 2022 [cited by examiner]
JP 2015056561A · 2015 [cited by applicant]
JP 2022094718A · 2022 [cited by applicant]
KR 1020150127630A · 2015 [cited by applicant]
Office Action issued on Feb. 19, 2026 in corresponding Korean Patent Application No. 10-2022-0124116 with English translation. [cited by applicant]