Method and apparatus for use in the design and manufacture of integrated circuits
A method and apparatus are provided for manufacturing integrated circuits performing invariant integer division x/d. A desired rounding mode is provided and an integer triple (a,b,k) for this rounding mode is derived. Furthermore, a set of conditions for the rounding mode is derived. An RTL representation is then derived using the integer triple. From this a hardware layout can be derived and an integrated circuit manufactured with the derived hardware layout. When the integer triple is derived a minimum value of k for the desired rounding mode and set of conditions is also derived.
1. A computer-implemented method for generating a representation of an integrated circuit for performing integer division x/d where x is a variable integer and d is an invariant integer constant, the method comprising:
deriving, using a parameter creator, an integer triple (a,b,k) which satisfies Round(x/d)=(ax+b)/2 k for a desired rounding mode; and
generating, using a synthesis tool, the representation of the integrated circuit for manufacture of the integrated circuit, wherein the representation of the integrated circuit is generated using a representation of the logical operation (ax+b)/2 k in accordance with the derived integer triple (a,b,k).
2. The method of claim 1 , wherein deriving the integer triple (a,b,k) comprises deriving an integer triple (a,b,k) which has a minimum value of k to satisfy Round(x/d)=(ax+b)/2 k for the desired rounding mode.
3. The method of claim 1 , further comprising deriving, using a representation generator, the representation of the logical operation (ax+b)/2 k using the derived integer triple (a,b,k).
4. The method of claim 1 , wherein the representation of the logical operation (ax+b)/2 k is an RTL (Register Transfer Level) representation.
5. The method of claim 1 , wherein the desired rounding mode is one of: (i) round towards zero, (ii) round to nearest, and (iii) faithful rounding.
6. The method of claim 1 , wherein deriving the integer triple (a,b,k) comprises deriving a value for b from values of k and a in which the derived value of b has the smallest Hamming weight of the possible values of b satisfying Round(x/d)=(ax+b)/2 k .
7. The method of claim 1 , further comprising manufacturing the integrated circuit from the representation of the integrated circuit.
8. The method of claim 1 , wherein the derivation of k is different for different rounding modes.
9. A non-transitory computer readable medium having stored thereon computer executable instructions that when executed cause at least one processor to:
derive, using a parameter creator, an integer triple (a,b,k) which satisfies Round(x/d)=(ax+b)/2 k for a desired rounding mode where x is a variable integer and d is an invariant integer constant; and
generate, using a synthesis tool, a representation of an integrated circuit for performing integer division xl d from a representation of the logical operation (ax+b)/2 k in accordance with the derived integer triple (a,b,k) for manufacture of the integrated circuit.
10. The non-transitory computer readable medium of claim 9 , wherein execution of the executable instructions cause the at least one processor to derive an integer triple (a,b,k) which has a minimum value of k to satisfy Round(x/d)=(ax+b)/2 k for the desired rounding mode.
11. The non-transitory computer readable medium of claim 9 , wherein execution of the executable instructions cause the at least one processor to derive, using a representation generator, the representation of the logical operation (ax+b)/2 k using the derived integer triple (a,b,k).
12. The non-transitory computer readable medium of claim 9 , wherein the representation of the logical operation (ax+b)/2 k is an RTL (Register Transfer Level) representation.
13. The non-transitory computer readable medium of claim 9 , wherein the desired rounding mode is one of: (i) round towards zero, (ii) round to nearest, and (iii) faithful rounding.
14. The non-transitory computer readable medium of claim 9 , wherein deriving the integer triple (a,b,k) comprises deriving a value for b from values of k and a in which the derived value of b has the smallest Hamming weight of the possible values of b satisfying Round(x/d)=(ax+b)/2 k .
15. The non-transitory computer readable medium of claim 9 , wherein the derivation of k is different for different rounding modes.
16. A method of manufacturing, using an integrated circuit manufacturing system, an integrated circuit for performing integer division, the method comprising:
processing, using a layout processing system, a representation of an integrated circuit for performing integer division xl d where x is a variable integer and d is an invariant integer constant so as to generate a circuit layout description of an integrated circuit for performing integer division, the representation of the integrated circuit for performing integer division being generated in accordance with a method comprising:
deriving, using a parameter creator, an integer triple (a,b,k) which satisfies Round(x/d)=(ax+b)/2 k for a desired rounding mode, and
generating, using a synthesis tool, the representation of the integrated circuit for manufacture of the integrated circuit, wherein the representation of the integrated circuit is generated using a representation of the logical operation (ax+b)/2 k in accordance with the derived integer triple (a,b,k); and
manufacturing, using an integrated circuit generation system, the integrated circuit for performing integer division according to the circuit layout description.