IP Library Granted Patent US 50,965
Granted Patent E1
US 50,965 · App. 18/242,827 · Granted Jul 21, 2026

System and method for providing 3D wafer assembly with known-good-dies

Inventors: Hong Shen (Palo Alto, CA); Liang Wang (Newark, CA); Guilian Gao (San Jose, CA)
Assignee: Adeia Semiconductor Technologies LLC
H10W72/0198H10P52/00H10P52/402H10P54/00H10P72/74H10P95/06H10W20/023H10W20/056H10W74/019H10W90/00H10P72/7416H10W72/07307H10W72/07331H10W90/297H10W90/732
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Quick Facts
Patent No.
US 50,965
App. No.
18/242,827
Granted
Jul 21, 2026
Kind
E1
Abstract

Systems and methods for providing 3D wafer assembly with known-good-dies are provided. An example method compiles an index of dies on a semiconductor wafer and removes the defective dies to provide a wafer with dies that are all operational. Defective dies on multiple wafers may be removed in parallel, and resulting wafers with all good dies stacked in 3D wafer assembly. In an implementation, the spaces left by removed defective dies may be filled at least in part with operational dies or with a fill material. Defective dies may be replaced either before or after wafer-to-wafer assembly to eliminate production of defective stacked devices, or the spaces may be left empty. A bottom device wafer may also have its defective dies removed or replaced, resulting in wafer-to-wafer assembly that provides 3D stacks with no defective dies.

Claims (39)

1 . A method, comprising:

removing defective dies from a first wafer of a semiconductor material;

after removing the defective dies from the first wafer, bonding a front surface of the first wafer to a temporary carrier;

bonding a front surface of one or more operational dies to the temporary carrier through holes in the first wafer at sites where the defective dies were removed;

after bonding the front surface of the first wafer to the temporary carrier, forming a bonding layer comprising one or more conductive pads on a backside of the first wafer;

bonding a the backside of the first wafer to a second wafer, wherein the backside of the first wafer is bonded to the second wafer via the bonding layer, the one or more conductive pads communicatively coupling the first wafer and the second wafer; and

removing the temporary carrier.

2 . The method of claim 1 , further comprising creating through-vias in the first wafer prior to bonding the front surface of the first wafer to the temporary carrier;

thinning a backside of the first wafer to expose bonding surfaces of the through-vias; and

bonding the through-vias of the first wafer to the second wafer prior to removing the temporary carrier.

3 . The method of claim 1 , further comprising removing defective dies from the second wafer prior to bonding the second wafer to the backside of the first wafer; and

bonding one or more operational dies to the backside of the first wafer through holes in the second wafer at sites where the defective dies were removed from the second wafer.

4 . The method of claim 3 , further comprising removing the temporary carrier from the first wafer after bonding the one or more operational dies to the backside of the first wafer through holes in the second wafer at sites where the defective dies were removed from the second wafer.

5 . The method of claim 3 , further comprising bonding the second wafer to one or more succeeding wafers prior to removing the temporary carrier from the first wafer.

6 . The method of claim 5 , further comprising repeating the process of removing defective dies from each of the one or more succeeding wafers and bonding one or more operational dies to each previous wafer through holes in each succeeding wafer where the defective dies were removed from the succeeding wafer, prior to removing the temporary carrier from the first wafer.

7 . The method of claim 1 , further comprising filling gaps around the one or more operational dies bonded to the temporary carrier through the holes with an insulation, a dielectric, a molding material, an oxide, or a benzocyclobutene (BCB)-based material.

8 . The method of claim 1 , wherein the removing the defective dies from the first wafer comprises dicing the defective die from the first wafer.

9 . The method of claim 8 , wherein the dicing is selected from a group consisting of laser dicing, plasma etching, ablation, water jet cutting, chemical etching, and laser grooving.

10 . The method of claim 1 , further comprising:

prior to removing the defective dies from the first wafer, thinning the first wafer;

removing the defective dies from the first wafer via dicing; and

filling gaps around the one or more operational dies bonded to the temporary carrier through the holes with an insulation, a dielectric, a molding material, an oxide, or a benzocyclobutene (BCB)-based material.

11 . The method of claim 10 , wherein the dicing is selected from a group consisting of laser dicing, plasma etching, ablation, water jet cutting, chemical etching, and laser grooving.

12. The method of claim 1 , wherein bonding the backside of the first wafer to the second wafer comprises directly bonding the backside of the first wafer to the second wafer.

13. A method comprising:

removing one or more devices from a first wafer comprising a plurality of devices;

after removing the one or more devices from the first wafer, bonding a device side of the first wafer to a temporary carrier;

bonding a device side of one or more singulated devices to the temporary carrier through openings in the first wafer formed by removing the one or more devices;

after bonding the device side of the first wafer to the temporary carrier, forming a bonding layer comprising one or more conductive pads on a second side of the first wafer;

bonding the second side of the first wafer to a second wafer, wherein the second side is different from the device side, wherein the second side of the first wafer is bonded to the second wafer via the bonding layer, the one or more conductive pads communicatively coupling the first wafer and the second wafer; and

removing the temporary carrier.

14. The method of claim 13 , wherein bonding the device side of the first wafer comprises bonding a front surface of the first wafer to the temporary carrier.

15. The method of claim 13 , wherein bonding the device side of the one or more singulated devices to the temporary carrier comprises bonding a front surface of the one or more singulated devices to the temporary carrier.

16. The method of claim 13 , wherein the one or more removed devices comprise one or more defective devices, and wherein the one or more singulated devices are operational devices.

17. The method of claim 13 , further comprising:

depositing a first material around the one or more singulated devices bonded to the temporary carrier within the openings.

18. The method of claim 17 , wherein the first material is one of an insulation, a dielectric, a molding material, an oxide, or a benzocyclobutene (BCB)-based material.

19. The method of claim 13 , wherein the removing one or more devices from the first wafer comprises dicing the one or more devices, the dicing selected from a group consisting of laser dicing, plasma etching ablation, water jet cutting chemical etching and laser grooving.

20. The method of claim 13 , wherein bonding the second side of the first wafer to the second wafer comprises directly bonding the second side of the first wafer to the second wafer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 9, 2026
From: SHEN, HONG; WANG, LIANG; GAO, GUILIAN
To: INVENSAS CORPORATION
Reel/Frame 074896/0698 →
Continuity (4)
Continuation 15834658 · Dec 7, 2017
Division 15152469 · May 11, 2016
Provisional Application 62387502 · Dec 26, 2015
Reissue 16687498 · Nov 18, 2019
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