Energization inspection apparatus, method for manufacturing semiconductor device, and energization method
An electric connection inspection device includes: a cooling plate; an insulating plate provided on the cooling plate; a first measurement electrode provided on the insulating plate; and a second measurement electrode and a third measurement electrode provided above the first measurement electrode and located apart from the first measurement electrode. The insulating plate includes a variable thermal resistance mechanism. A semiconductor device can be installed between the first measurement electrode and the second measurement electrode and between the first measurement electrode and the third measurement electrode.
1. An energization method using an energization inspection apparatus including:
a cooling plate;
an insulating plate provided on the cooling plate and having a variable thermal resistance mechanism;
a first electrode provided on the insulating plate; and
a second electrode and a third electrode provided above the first electrode and located away from the first electrode, the energization method comprising:
(a) preparing a semiconductor device including a drain electrode, a source electrode, and a gate pad electrode;
(b) after step (a), installing the semiconductor device between the first electrode and the second electrode and between the first electrode and the third electrode, electrically connecting the first electrode to the drain electrode, electrically connecting the second electrode to the source electrode, and electrically connecting the third electrode to the gate pad electrode;
(c) after step (b), adjusting a resistance value of the variable thermal resistance mechanism such that a maximum rated junction temperature of the semiconductor device is reached when a maximum rated forward current of the semiconductor device is applied to a built-in diode of the semiconductor device;
(d) after step (c), measuring a first on-voltage of the semiconductor device;
(e) after step (c), measuring a first leakage current when a specified voltage is applied between the source electrode and the drain electrode in a state where the source electrode and the gate pad electrode are electrically short-circuited or in a state where a negative bias is applied to the gate pad electrode with respect to the source electrode;
(f) after steps (d) and (e), applying a forward current to the built-in diode;
(g) after step (f), measuring a second on-voltage of the semiconductor device;
(h) after step (g), calculating a value of change in voltage between the second on-voltage and the first on-voltage, and sorting the semiconductor device as a conforming product when the value of change in voltage is smaller than a specified value;
(i) after step (h), measuring a second leakage current when a specified voltage is applied between the source electrode and the drain electrode in a state where the source electrode and the gate pad electrode are electrically short-circuited or in a state where a negative bias is applied to the gate pad electrode with respect to the source electrode for the semiconductor device sorted as a conforming product; and
(j) after step (i), calculating a value of change in current between the second leakage current and the first leakage current, and sorting the semiconductor device as a conforming product when the value of change in current is smaller than a specified value, wherein
the semiconductor device includes:
a semiconductor substrate of a first conductivity type that has a front surface and a back surface opposite to the front surface and is made of silicon carbide;
a semiconductor layer of the first conductivity type formed on the front surface of the semiconductor substrate and made of silicon carbide;
a body region of a second conductivity type opposite to the first conductivity type formed in the semiconductor layer;
a source region of the first conductivity type formed in the body region;
a gate insulator film formed on the body region;
a gate electrode formed on the gate insulator film;
the source electrode formed on the body region and the source region so as to be electrically connected to the body region and the source region;
the gate pad electrode formed on the gate electrode so as to be electrically connected to the gate electrode; and
the drain electrode formed on the back surface of the semiconductor substrate, and
the built-in diode includes the body region and the semiconductor layer.
2. The energization method according to claim 1 , wherein in step (f), the maximum rated forward current of the semiconductor device is applied to the built-in diode of the semiconductor device at the maximum rated junction temperature of the semiconductor device.
3. The energization method according to claim 2 , wherein in steps (e) and (i), the first leakage current and the second leakage current are measured based on a maximum rated voltage of the semiconductor device.
4. The energization method according to claim 3 , wherein
the energization inspection apparatus further includes a pressure vessel provided on the first electrode and capable of changing a pressure inside the pressure vessel to a pressure different from a pressure outside the pressure vessel,
the second electrode and the third electrode are attached to the pressure vessel,
in step (b), the semiconductor device is housed inside the pressure vessel, and
in steps (e) and (i), the pressure inside the pressure vessel is higher than the pressure outside the pressure vessel.
5. The energization method according to claim 4 , wherein the pressure vessel is made of an insulator.